ISL6336D Datasheet, PDF (5/30 Pages) Intersil Corporation – VR11.1, 6-Phase PWM Controller with Phase Dropping,Droop Disabled and Load Current Monitoring Features

ISL6336D
Pin Descriptions (Continued)
PIN #
PIN NAME
DESCRIPTION
16, 15
FB, COMP
Inverting input and output of the error amplifier respectively. FB can be connected to VDIFF through a resistor.
COMP is tied back to FB through an external R-C network to compensate the regulator.
17, 19, 18
VDIFF, VSEN, RGND
VSEN and RGND form the precision differential remote-sense amplifier. This amplifier converts the differential
voltage of the remote output to a single-ended voltage referenced to local ground. VDIFF is the amplifier’s output
and the input to the regulation and protection circuitry. Connect VSEN and RGND to the sense pins of the remote
load.
20
TCOMP
Temperature compensation scaling input. The voltage sensed on the TM pin is utilized as the temperature input to
adjust IMON and the overcurrent protection limit to effectively compensate for the temperature coefficient of the
current sense element. To implement the integrated temperature compensation, a resistor divider circuit is needed
with one resistor being connected from TCOMP to VCC of the controller and another resistor being connected from
TCOMP to GND. Changing the ratio of the resistor values will set the gain of the integrated thermal compensation.
When integrated temperature compensation function is not used, connect TCOMP to GND.
21
VCC
Supplies the power necessary to operate the chip. The controller starts to operate when the voltage on this pin
exceeds the rising POR threshold and shuts down when the voltage on this pin drops below the falling POR
threshold. Connect this pin directly to a +5V supply.
22, 23,
26, 27,
28, 29,
32, 33,
34, 35,
38, 39
ISEN5+, ISEN5-,
ISEN2-, ISEN2+,
ISEN4+, ISEN4-,
ISEN1-, ISEN1+,
ISEN3+, ISEN3-,
ISEN6-, ISEN6+
The ISEN+ and ISEN- pins are current sense inputs to individual differential amplifiers. The sensed current is
used for channel current balancing and overcurrent protection. Inactive channels should have their respective
current sense inputs left open (for example, open ISEN6+ and ISEN6- for 5-phase operation).
For DCR sensing, connect each ISEN- pin to the node between the RC sense elements. Tie the ISEN+ pin to the
other end of the sense capacitor through a resistor, R_ISEN. The voltage across the sense capacitor is proportional
to the inductor current. Therefore, the sense current is proportional to the inductor current and scaled by the DCR
of the inductor and R_ISEN. To match the time delay of the internal circuit, a capacitor is needed between each
ISEN+ pin and GND, as described in “Current Sensing” on page 14.
24, 25, 30,
31, 36, 37
PWM5, PWM2, PWM4,
PWM1, PWM3, PWM6
Pulse width modulation outputs. Connect these pins to the PWM input pins of the Intersil driver IC. The number
of active channels is determined by the state of PWM2, PWM3, PWM4, PWM5 and PWM6. Tie PWM2 to VCC to
configure for 1-phase operation. Tie PWM3 to VCC to configure for 2-phase operation. Tie PWM4 to VCC to
configure for 3-phase operation. Tie PWM5 to VCC to configure for 4-phase operation. Tie PWM6 to VCC to
configure for 5-phase operation. In addition, tie PSI# to GND to configure for single phase operation as well.
40
EN_PWR
This pin is a threshold-sensitive enable input for the controller. Connecting the 12V supply to EN_PWR through
an appropriate resistor divider provides a means to synchronize power-up of the controller and the MOSFET
driver ICs. When EN_PWR is driven above 0.875V, the ISL6336D is active depending on status of the EN_VTT,
the internal POR, and pending fault states. Driving EN_PWR below 0.745V will clear all fault states and prime
the ISL6336D to soft-start when reenabled.
41
EN_VTT
This pin is another threshold-sensitive enable input for the controller. It’s typically connected to VTT output of VTT
voltage regulator in the computer mother board. When EN_VTT is driven above 0.875V, the ISL6336D is active
depending on status of the EN_PWR, the internal POR, and pending fault states. Driving EN_VTT below 0.745V
will clear all fault states and prime the ISL6336D to soft-start when reenabled.
42
FS
Use this pin to set up the desired switching frequency. A resistor placed from FS to ground/VCC will set the
switching frequency. The relationship between the value of the resistor and the switching frequency will be
approximated by Equation 3. This pin is also used with SS and PSI# pins for phase dropping decoding (see
Table 2 on page 14).
43
SS
Use this pin to set up the desired start-up oscillator frequency. A resistor placed from SS to ground/VCC will set
up the soft-start ramp rate. The relationship between the value of the resistor and the soft-start ramp-up time
will be approximated by Equations 14 and 15. This pin is also used with FS and PSI# pins for phase dropping
decoding (see Table 2 on page 14).
44
OVP
The overvoltage protection output indication pin. This pin can be pulled to VCC and is latched when an
overvoltage condition is detected. When the OVP indication is not used, keep this pin open.
45
VR_RDY
VR_RDY indicates that soft-start has completed and the output voltage is within the regulated range around the
VID setting. It is an open-drain logic output. When OCP or OVP occurs, VR_RDY will be pulled to low. It will also
be pulled low if the output voltage is below the undervoltage threshold.
46
VR_FAN
VR_FAN is an output pin with open-drain logic output. It will be pulled low if the measured VR temperature is less
than a certain level, and open when the measured VR temperature reaches a certain level. An external pull-up
resistor is needed.
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FN8320.0
October 6, 2014