ISL62883 Datasheet, PDF (37/39 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62883, ISL62883B
Typical Performance (Continued)
Phase Margin
Gain
FIGURE 52. LOAD TRANSIENT RESPONSE WITH
OVERSHOOT REDUCTION FUNCTION
ENABLED, V_IN = 12V, SV CLARKSFIELD
CPU TEST CONDITION: VID = 0.95V,
I_O = 12A/51A, di/dt = “FASTEST”,
LL = 1.9mΩ, Ch1: LGATE1, Ch2: V_O, Ch3:
LGATE2, Ch4: ISL6208 LGATE
FIGURE 53. REFERENCE DESIGN LOOP GAIN T2(s)
MEASUREMENT RESULT
1000
900
800
700
600
500
400
300 ^SPEC
200
100
V_IN = 19V
V_IN = 12V
V_IN = 8V
00 _{5 10 15 20 25 30 35 40 45 50}
I_OUT (A)
FIGURE 54. IMON, VID = 1.075V
5.0
4.5
4.0
3.5
3.0 _{PSI# = 0, DPRSLPVR = 0, 2-PHASE CCM}
2.5
2.0
1.5
1.0
PSI# = 1, DPRSLPVR = 0, 3-PHASE CCM
0.5
0.0
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 55. REFERENCE DESIGN FDIM RESULT
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
37
FN6891.2
February 25, 2010