ISL62883 Datasheet, PDF (24/39 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62883, ISL62883B
constant long enough such that switching frequency
ripples are removed.
Compensator
Figure 15 shows the desired load transient response
waveforms. Figure 21 shows the equivalent circuit of a
voltage regulator (VR) with the droop function. A VR is
equivalent to a voltage source (= VID) and output
impedance Z_out(s). If Z_out(s) is equal to the load line
slope LL, i.e. constant output impedance, in the entire
frequency range, V_o will have square response when I_o
has a square change.
Zout(s)=LL
io
VID
VR
Load Vo
FIGURE 21. VOLTAGE REGULATOR EQUIVALENT
CIRCUIT
Intersil provides a Microsoft Excel-based spreadsheet to
help design the compensator and the current sensing
network, so the VR achieves constant output impedance
as a stable system. Figure 24 shows a screenshot of the
spreadsheet.
A VR with active droop function is a dual-loop system
consisting of a voltage loop and a droop loop which is a
current loop. However, neither loop alone is sufficient to
describe the entire system. The spreadsheet shows two
loop gain transfer functions, T1(s) and T2(s), that
describe the entire system. Figure 22 conceptually shows
T1(s) measurement set-up and Figure 23 conceptually
shows T2(s) measurement set-up. The VR senses the
inductor current, multiplies it by a gain of the load line
slope, then adds it on top of the sensed output voltage
and feeds it to the compensator. T(1) is measured after
the summing node, and T2(s) is measured in the voltage
loop before the summing node. The spreadsheet gives
both T1(s) and T2(s) plots. However, only T2(s) can be
actually measured on an ISL62883 regulator.
T1(s) is the total loop gain of the voltage loop and the
droop loop. It always has a higher crossover frequency
than T2(s) and has more meaning of system stability.
T2(s) is the voltage loop gain with closed droop loop. It
has more meaning of output voltage response.
Design the compensator to get stable T1(s) and T2(s)
with sufficient phase margin, and output impedance
equal or smaller than the load line slope.
Q1
Vin
GATE Q2
DRIVER
L
Vo
Cout
io
LOAD LINE SLOPE
20Ω
Mod.
EA
Comp
VID
LOOP GAIN = ^{CHANNEL B}
CHANNEL A
ISOLATION
TRANSFORMER
CHANNEL A
NETWORK
ANALYZER
EXCITATION
OUTPUT
CHANNEL B
FIGURE 22. LOOP GAIN T1(s) MEASUREMENT SET-UP
Q1
Vin
GATE Q2
DRIVER
L
Vo
Cout
io
LOAD LINE SLOPE
Mod.
EA Ω
Comp
VID
LOOP GAIN = ^{CHANNEL B}
CHANNEL A
CHANNEL A
NETWORK
ANALYZER
20
ISOLATION
TRANSFORMER
EXCITATION
OUTPUT
CHANNEL B
FIGURE 23. LOOP GAIN T2(s) MEASUREMENT SET-UP
24
FN6891.2
February 25, 2010