ISL62883 Datasheet, PDF (20/39 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs

ISL62883, ISL62883B
the output voltage overshoot condition. The COMP
voltage will fall and hit the clamp voltage when the
output voltage overshoots. The ISL62883 will turn off
LGATE1 and LGATE2, and tri-state PWM3 when COMP is
being clamped. All the low-side MOSFETs in the power
stage will be turned off. When the output voltage has
reached its peak and starts to come down, the COMP
voltage starts to rise and is no longer clamped. The
ISL62883 will resume normal PWM operation.
When PSI# is low, indicating a low power state of the
CPU, the controller will disable the overshoot reduction
function as large magnitude transient event is not
expected and overshoot is not a concern.
While the overshoot reduction function reduces the
output voltage overshoot, energy is dissipated on the
low-side MOSFET, causing additional power loss. The
more frequent transient event, the more power loss
dissipated on the low-side MOSFET. The MOSFET may
face severe thermal stress when transient events
happen at a high repetitive rate. User discretion is
advised when this function is enabled.
Key Component Selection
R_BIAS
The ISL62883 uses a resistor (1% or better tolerance is
recommended) from the RBIAS pin to GND to establish
highly accurate reference current sources inside the IC.
Using R_BIAS = 47kΩ enables the overshoot reduction
function and using R_BIAS = 147kΩ disables this
function. Do not connect any other components to this
pin. Do not connect any capacitor to the RBIAS pin as it
will create instability.
Care should be taken in layout that the resistor is placed
very close to the RBIAS pin and that a good quality
signal ground is connected to the opposite side of the
R_BIAS resistor.
R_is and C_is
As Figures 1 and 2, show, the ISL62883 needs the R_is -
C_is network across the ISUM+ and the ISUM- pins to
stabilize the droop amplifier. The preferred values are
R_is = 82.5Ω and C_is = 0.01µF. Slight deviations from the
recommended values are acceptable. Large deviations
may result in instability.
Inductor DCR Current-Sensing Network
Phase1 Phase2 Phase3
Rsum
Rsum
Rsum
ISUM+
L
L
L
DCR DCR
DCR
Rntcs
Rp
Rntc
Ro
Ro
Ro
Cn Vcn
Ri ^ISUM-
Io
FIGURE 14. DCR CURRENT-SENSING NETWORK
Figure 14 shows the inductor DCR current-sensing
network for a 3-phase solution. An inductor current
flows through the DCR and creates a voltage drop. Each
inductor has two resistors in R_sum and R_o connected to
the pads to accurately sense the inductor current by
sensing the DCR voltage drop. The R_sum and R_o
resistors are connected in a summing network as
shown, and feed the total current information to the
NTC network (consisting of R_ntcs, R_ntc and R_p) and
capacitor C_n. R_ntc is a negative temperature coefficient
(NTC) thermistor, used to temperature-compensate the
inductor DCR change.
The inductor output side pads are electrically shorted in
the schematic, but have some parasitic impedance in
actual board layout, which is why one cannot simply
short them together for the current-sensing summing
network. It is recommended to use 1Ω~10Ω R_o to create
quality signals. Since R_o value is much smaller than the
rest of the current sensing circuit, the following analysis
will ignore it for simplicity.
The summed inductor current information is presented to
the capacitor C_n. Equations 19 thru 23 describe the
frequency-domain relationship between inductor total
current I_o(s) and C_n voltage V_Cn(s):
⎛
⎞
V_Cn(s)
=
⎜
⎜
⎜
⎝
-----------^R-----ⁿ---^t--^c---ⁿ----^e---^t-----------
R_nt
cn
e
t
+
-^R----^s---^u---^m---
N
×
D_-----CN_-----R_{---⎟⎟⎟}
⎠
× I_o(s) × A_cs(s)
(EQ. 19)
R_ntcnet
=
(_---R_{-----n---t--c---s----+-----}R_{----n----t--c---})_---×_-----R_----p--
R_ntcs + R_ntc + R_p
A_cs(s)
=
----¹----+-----^{ω------s----L-----}
1 + _ω-----_s-^s--_n---_s-
(EQ. 20)
(EQ. 21)
ω_L
=
D_-----C_-----R_---
L
(EQ. 22)
20
FN6891.2
February 25, 2010