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ISL62883 Datasheet, PDF (21/39 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5 Mobile CPUs and GPUs
ISL62883, ISL62883B
ωsns
=
---------------------------1-----------------------------
-R----n---t--c---n----e---t---×------R--------s--N----u-------m------
Rntcnet
+
-R----s---u---m---
N
×
Cn
where N is the number of phases.
(EQ. 23)
Transfer function Acs(s) always has unity gain at DC. The
inductor DCR value increases as the winding temperature
increases, giving higher reading of the inductor DC
current. The NTC Rntc values decreases as its
temperature decreases. Proper selections of Rsum, Rntcs,
Rp and Rntc parameters ensure that VCn represent the
inductor total DC current over the temperature range of
interest.
There are many sets of parameters that can properly
temperature-compensate the DCR change. Since the
NTC network and the Rsum resistors form a voltage
divider, Vcn is always a fraction of the inductor DCR
voltage. It is recommended to have a higher ratio of Vcn
to the inductor DCR voltage, so the droop circuit has
higher signal level to work with.
A typical set of parameters that provide good
temperature compensation are: Rsum = 3.65kΩ,
Rp = 11kΩ, Rntcs = 2.61kΩ and Rntc = 10kΩ
(ERT-J1VR103J). The NTC network parameters may
need to be fine tuned on actual boards. One can apply
full load DC current and record the output voltage
reading immediately; then record the output voltage
reading again when the board has reached the thermal
steady state. A good NTC network can limit the output
voltage drift to within 2mV. It is recommended to follow
the Intersil evaluation board layout and current-sensing
network parameters to minimize engineering time.
VCn(s) also needs to represent real-time Io(s) for the
controller to achieve good transient response. Transfer
function Acs(s) has a pole ωsns and a zero ωL. One needs
to match ωL and ωsns so Acs(s) is unity gain at all
frequencies. By forcing ωL equal to ωsns and solving for
the solution, Equation 24 gives Cn value.
Cn
=
------------------------------L--------------------------------
-R----n---t--c---n----e---t---×------R--------s--N-----u------m------
Rn
t
c
ne
t
+
-R----s---u---m---
N
×
D
C
R
(EQ. 24)
io
Vo
FIGURE 16. LOAD TRANSIENT RESPONSE WHEN Cn
IS TOO SMALL
io
Vo
FIGURE 17. LOAD TRANSIENT RESPONSE WHEN Cn
IS TOO LARGE
For example, given N = 3, Rsum = 3.65kΩ, Rp = 11kΩ,
Rntcs = 2.61kΩ, Rntc = 10kΩ, DCR = 0.88mΩ and
L = 0.36µH, Equation 24 gives Cn = 0.406µF.
Assuming the compensator design is correct, Figure 15
shows the expected load transient response waveforms
if Cn is correctly selected. When the load current Icore
has a square change, the output voltage Vcore also has
a square response.
If Cn value is too large or too small, VCn(s) will not
accurately represent real-time Io(s) and will worsen the
transient response. Figure 16 shows the load transient
response when Cn is too small. Vcore will sag excessively
upon load insertion and may create a system failure.
Figure 17 shows the transient response when Cn is too
large. Vcore is sluggish in drooping to its final value.
There will be excessive overshoot if load insertion occurs
during this time, which may potentially hurt the CPU
reliability.
io iL
io
Vo
FIGURE 15. DESIRED LOAD TRANSIENT RESPONSE
WAVEFORMS
Vo
RING
BACK
FIGURE 18. OUTPUT VOLTAGE RING BACK PROBLEM
21
FN6891.2
February 25, 2010