X9440 Datasheet, PDF (3/21 Pages) Intersil Corporation – Mixed Signal with SPI Interface

X9440
PIN CONFIGURATION
V_CC
V_L0
V_H0
V_W0
CS
WP
SI
A1
V_L1
V_H1
V_W1
V_SS
SOIC
1
24
2
23
3
22
4
21
5
20
6
7
X9440
19
18
8
17
9
16
10
15
11
14
12
13
V+
V_OUT0
V_NI0
NC
A0
SO
HOLD
SCK
NC
V_NI1
V_OUT1
V-
SI
A1
V_L1
V_H1
V_W1
V_SS
NC
V-
V_OUT1
V_NI1
SCK
HOLD
TSSOP
1
24
2
23
3
22
4
21
5
20
6
19
7 ^X9440 18
8
17
9
16
10
15
11
14
12
13
WP
CS
V_W0
V_H0
V_L0
V_CC
NC
V+
V_OUT0
V_NI0
A0
S0
PIN NAMES
Symbol
SCK
S1, SO
A0-A1
V_H0-V_H1,
V_L0-V_L1
V_W0–V_W1
V_NI0, V_NI1
V_OUT0, V_OUT1
WP
V+,V-
V_CC
V_SS
NC
Description
Serial Clock
Serial Data
Device Address
Potentiometers (terminal equivalent)
Potentiometers (wiper equivalent)
Comparator Input Voltages
Buffered Comparator Outputs
Hardware Write Protection
Analog and Voltage Comparator
Supplies
System Supply Voltage
System Ground
No Connection
PRINCIPLES OF OPERATION
The X9440 is a highly integrated microcircuit incorpo-
rating two resistor arrays, two voltage comparators
and their associated registers and counters; and the
serial interface logic providing direct communication
between the host and the digitally-controlled potenti-
ometers and voltage comparators.
Serial Interface
The X9440 supports the SPI interface hardware con-
ventions. The device is accessed via the SI input with
data clocked in on the rising SCK. CS must be LOW
and the HOLD and WP pins must be HIGH during the
entire operation.
The SO and SI pins can be connected together, since
they have three state outputs. This can help to reduce
system pin count.
Array Description
The X9440 is comprised of two resistor arrays and two
voltage comparators. Each array contains 63 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (V_H and V_L
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(V_W) output. Within each individual array only one
switch may be turned on at a time. These switches are
controlled by a volatile wiper counter register (WCR).
The six bits of the WCR are decoded to select, and
enable, one of sixty-four switches.
The WCR may be written directly, or it can be changed
by transferring the contents of one of four associated
data registers into the WCR. These data registers and
the WCR can be read and written by the host system.
Voltage Comparator
The comparator compares the wiper voltage V_W with
the external input voltage V_NI. The comparator and its
logic level output are controlled by the shutdown,
latch, and enable bits of the analog control register
(ACR). Enable connects the comparator output to the
V_OUT pin, Latch memorizes the output logic state, and
shutdown removes the analog section supply voltages
to save power. The analog control register (ACR) is
programmed using the SPI serial interface.
The ACR may be written directly, or it can be changed
by transferring the contents of one of four associated
data registers into the ACR. These data registers and
the ACR may be read and written by the host system.
3
FN8200.0
March 28, 2005