X9440 Datasheet, PDF (2/21 Pages) Intersil Corporation – Mixed Signal with SPI Interface

X9440
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input (SI)
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9440.
Chip Select (CS)
When CS is HIGH, the X9440 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9440, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume com-
munication, HOLD is brought HIGH, again while SCK
is LOW. If the pause feature is not used, HOLD should
be held HIGH at all times.
Device Address (A₀-A₁)
The address inputs are used to set the least significant
2 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
Address input in order to initiate communication with
the X9440. A maximum of 4 devices may share the
same SPI serial bus.
Potentiometer Pins
V_H (V_H0-V_H3), V_L (V_L0-V_L3)
The V_H and V_L inputs are equivalent to the terminal con-
nections on either end of a mechanical potentiometer.
V_W (V_W0-V_W1)
The wiper output V_W is equivalent to the wiper output
of a mechanical potentiometer and is connected to the
inverting input of the voltage comparator.
Comparator and Device Pins
Voltage Input V_NI0, V_NI1
V_NI0 and V_NI1 are the input voltages to the plus (non-
inverting) inputs of the two comparators.
Buffered Voltage Outputs V_OUT0, V_OUT1
V_OUT0 and V_OUT1 are the buffered voltage comparator
outputs controlled by bits in the volatile analog control
register.
Hardware Write Protect Input WP
The WP pin when low prevents non volatile writes to
the wiper counter and analog control registers.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages for
the XDCP analog section and the voltage comparators.
System Supply V_CC and Ground V_SS
The system supply, V_CC and its reference V_SS is used
to bias the interface and control circuits.
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FN8200.0
March 28, 2005