ISL6146 Datasheet, PDF (3/23 Pages) Intersil Corporation – Low Voltage ORing FET Controller

ISL6146
Pin Descriptions (Continued)
MSOP/
DFN SYMBOL
DESCRIPTION
4
OVP Programmable OV protection to prevent continued operation when the monitored voltage is too high. A back-to-back FET
ISL6146C
configuration must be employed to implement the OVP capability. Range: 0 to 24V
5
GND Chip ground reference.
6
FAULT Open-Drain pull-down fault indicating output with internal on chip filtering (T_FLT). The ISL6146 fault detection circuitry will
pull-down this pin to GND as it detects a fault or to a disable input.
Different types of faults and their detection mechanisms are discussed in more detail on page 16, these faults include:
a. GATE is OFF (GATE < V_IN+0.2V) or
b. V_IN-V_OUT > 0.57V when ON.
c. FET G-D or G-S or D-S shorts.
d. V_IN < POR_L2H
e. V_IN < V_OUT
f. Over-Temperature
Range: 0 to V_OUT
7
ADJ Resistor programmable V_IN - V_OUT Voltage Threshold (Vth) of the High Speed Comparator. This pin is either directly connected
to VOUT or can be connected through a 5kΩ to 100kΩ resistor to GND. Allows for adjusting the voltage difference threshold to
prevent unintended turn-off of the pass FET due to normal system voltage fluctuations.
Range: 0.4 to V_OUT
8
VOUT The second sensing node for external FET control and connected to the Load side (ORing MOSFET Drain). This is the common
connection point for multiple paralleled supplies. V_OUT is compared to V_IN to determine when the ORing FET has to be turned
off. Range: 0 to 24V
PAD Thermal Connect to GND
Pad
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART MARKING
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL6146AFUZ (Note 4)
6146A
-40 to +125
8 Ld MSOP
M8.118
ISL6146AFRZ
46AF
-40 to +125
8 Ld 3x3 DFN
L8.3x3J
ISL6146BFUZ (Note 4)
6146B
-40 to +125
8 Ld MSOP
M8.118
ISL6146BFRZ
46BF
-40 to +125
8 Ld 3x3 DFN
L8.3x3J
ISL6146CFUZ (Note 4)
6146C
-40 to +125
8 Ld MSOP
M8.118
ISL6146CFRZ
46CF
-40 to +125
8 Ld 3x3 DFN
L8.3x3J
ISL6146AEVAL1Z
ISL6146A Evaluation Board
ISL6146BEVAL1Z
ISL6146B Evaluation Board
ISL6146CEVAL1Z
ISL6146B Evaluation Board
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6146. For more information on MSL please see techbrief TB363.
4. MSOP packaged parts to be released soon.
3
FN7667.0
December 16, 2011