ISL6146 Datasheet, PDF (14/23 Pages) Intersil Corporation – Low Voltage ORing FET Controller

ISL6146
Typical Performance Curves (Continued)
VIN
GATE
VIN
VOUT
FLT
VIN - VOUT
FIGURE 39. V_IN HOT SWAPPED TO GATE WITH BIAS = 12V NO LOAD
35
30
25
20
15
10
5
0
-1
0
1
2
3
4
5
6
7
HS COMP ADJUST V_TH (mV)
FIGURE 41. HIGH SPEED COMPARATOR OFFSET VOLTAGE
FIGURE 40. FAULT ASSERTING V_IN TO V_OUT > V_{FWD_FLT}
+
V_DS
0V
V_R
t_HSpd
20V
V_GATE
V_BIAS = V_IN = 12V
t_OFF
12.6V
FIGURE 42. FAST RAMP REVERSE PROTECTION TIMING DIAGRAM
14
FN7667.0
December 16, 2011