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ISL6261A Datasheet, PDF (29/34 Pages) Intersil Corporation – Single-Phase Core Regulator for IMVP-6 Mobile CPUs
ISL6261A Eval1 Evaluation Board Schematics
Controller
J8
+3.3V1
12 2
1
2
3
4
5
+3.3V
S1
1
2
3
4
5
ON
ON
ON
ON
ON
10
9
8
7
6
R108
DPRSTPD#NP
SD05H0SK
FDE
DPRSLPVR
PSI#
PMON/PGD_IN
IN
IN
R107
0
IN
VR_ON
DPRSLPVR
DPRSTP#
OUT CLK_EN#
PGOOD
+3.3V
+3.3V
J15
1 12 2
PGOOD
DPRSLPVR
FDE
PSI#
J10
1
2
3
1
2
3
1X3
C24
1UF
3V3
VID6
VID5
VID4
VID3
VID2
VID1
VID0
IN
IN
IN
IN
IN
IN
IN
J17
2 21 1
+3.3V
11
22
33
44
55
66
77
U1
14 14
13 13
12 12
11 11
10 10
99
88
MST7_SPST
5V
3.3V J3
2N7002
Q5 1
VCC_PRM
R4
6.34K
C3
DNP
OCSET
VW
SOFT
PMON/PGD_IN
RBIAS
VR_TT
FB
FDE
PMON
RBIAS
VR_TT
NTC
SOFT
OCSET
VW
COMP
FB
C9
R19
IN VCCSENSE
IN VCORE
R5
0
IN GND_POWER
R6
0
IN VSSSENSE
150PF 464K
COMP
C12
47PF
R11
0
C14
1000PF
R12
0
DROOP
R7
C6
DNP R8 DNP
DFB
R15
P12
R23
C20
5.49K 390PF
R24 VDIFF1
2.21K
R25
EP
C23
DNP
R30
0
0
C18
VSEN
330PF
RTN
5.23K C7
1K
330PF
VCC_PRM
IN
VID2
U6
VID1
VID0
VCCP
+5V
LGATE
VSSP
LGATE OUT
ISL6261A
PHASE
UGATE
GND_POWER OUT
BOOT
NC
PHASE OUT
UGATE OUT
BOOT OUT
R33 1 1 2 2 5V
2
J16
R34
0
R35
VIN IN
0
NOTE:
RUN LGATE1 TRACE PARALLEL TO TRACE CONNECTING
PGND1 AND SOURCE OF Q3 AND Q4.
VSUM
IN
+3.3V
J2
J4
R43
10K
+3.3V R44
10K
IN VR_ON1 R45
10K
3 OFF
1 S4 2
VR_ON
ON
J19
1
2
3
1
2
3
1X3
TITLE:
ISL6261 EVAL1
CONTROLLER
ENGINEER:
JIA WEI
DRAWN BY:
REV:
?
DATE:
MAR-14
SHEET:
1 OF