ISL6261A Datasheet, PDF (27/34 Pages) Intersil Corporation – Single-Phase Core Regulator for IMVP-6 Mobile CPUs

ISL6261A
Typical Performance (ISL6261 Data, Taken on ISL6261A Eval1 Rev.A Evaluation Board) (Continued)
FIGURE 31. C4 ENTRY/EXIT, V_IN = 12.6V, Io = 0.7A,
HFM/LFM/C4 VID = 1.05V/0.8375V/0.7625V,
FDE = DPRSLPVR, Ch1: PMON, Ch2: V_O,
Ch3: 40k/100pF FILTERED PMON, Ch4: PHASE
FIGURE 32. VID TOGGLING, V_IN = 12.6V, Io= 16.5A,
HFM/LFM VID = 1.05V/0.8375V,
FDE = DPRSLPVR, Ch1: PMON, Ch2: V_O,
Ch3: 40k/100pF FILTERED PMON, Ch4: PHASE
FIGURE 33. LOAD TRANSIENT RESPONSE IN CCM
V_IN = 12.6V, Io = 2AÆ20A (100A/µs), VID = 1.1V,
Ch1: PMON, Ch2: V_O, Ch3: 40k/100pF FILTERED
PMON, Ch4: PHASE
FIGURE 34. LOAD TRANSIENT RESPONSE IN CCM
V_IN = 12.6V, Io = 20AÆ2A (50A/µs), VID = 1.1V,
Ch1: PMON, Ch2: V_O, Ch3: 40k/100pF FILTERED
PMON, Ch4: PHASE
100A/us
50A/us
FIGURE 35. LOAD TRANSIENT RESPONSE IN CCM
V_IN = 12.6V, Io = 2AÆ20A (100A/µs)Æ2A (50A/µs),
VID = 1.1V, Ch1: PMON, Ch2: V_O, Ch3: 40k/100pF
FILTERED PMON, Ch4: PHASE
27
FIGURE 36. LOAD TRANSIENT RESPONSE IN EDEM
V_IN = 8V, Io = 2AÅÆ20A, VID = 1.1V,
Ch1: Io, Ch2: V_O, Ch3: PMON, Ch4: PHASE
FN6354.3
November 5, 2009