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ISL6261A Datasheet, PDF (26/34 Pages) Intersil Corporation – Single-Phase Core Regulator for IMVP-6 Mobile CPUs
ISL6261A
Typical Performance (ISL6261 Data, Taken on ISL6261A Eval1 Rev.A Evaluation Board) (Continued)
5V/div
5V/div
0.1V/div
1V/div
10V/div
FIGURE 25. VBOOT TO VID, VIN = 19V, Io = 2A, VID = 1.5V,
Ch1: CLK_EN#, Ch2: VO, Ch3: PMON,
Ch4: PHASE
5V/div
0.5V/div
7.68ms
5V/div
10V/div
FIGURE 27. CLK_EN AND PGOOD ASSERTION DELAY,
VIN = 19V, Io = 2A, VID = 1.1V, Ch1: CLK_EN#,
Ch2: VO, Ch3: PGOOD, Ch4: PHASE
0.1V/div
1V/div
10V/div
FIGURE 26. VBOOT TO VID, VIN = 19V, Io = 2A, VID = 0.7625V,
Ch1: CLK_EN#, Ch2: VO, Ch3: PMON,
Ch4: PHASE
FIGURE 28. SHUT DOWN, VIN = 12.6V, Io = 2A, VID = 1.1V,
Ch1: VR_ON, Ch2: VO, Ch3: PGOOD,
Ch4: PHASE
FIGURE 29. SOFT START INRUSH CURRENT, VIN = 19V,
Io = 2A, VID = 1.1V, Ch1: DROOP-VO
(2.1mV = 1A), Ch2: VO, Ch3: Vcomp, Ch4: PHASE
26
FIGURE 30. VIN TRANSIENT TEST, VIN = 8Æ19V, Io = 2A,
VID = 1.1V, Ch2: VO, Ch3: VIN, Ch4: PHASE
FN6354.3
November 5, 2009