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ISL6261A Datasheet, PDF (22/34 Pages) Intersil Corporation – Single-Phase Core Regulator for IMVP-6 Mobile CPUs
ISL6261A
For example: L = 0.45µH, DCR = 1.1mΩ, Rs = 7.68kΩ, and
Rn = 3.4kΩ
0.45μH
Cn
=
0.0011
parallel(7.68k,3.4k)
= 174nF
(EQ. 27)
Since the inductance and the DCR typically have 20% and
7% tolerance respectively, the L/DCR time constant of each
individual inductor may not perfectly match the RC time
constant of the current sensing network. In mass production,
this effect will make the transient response vary a little bit
from board to board. Compared with potential long-term
damage on CPU reliability, an immediate system failure is
worse. So it is desirable to avoid the waveforms shown in
Figure 11. It is recommended to choose the minimum Cn
value based on the maximum inductance so only the
scenarios of Figures 10 and 12 may happen. It should be
noted that, after calculation, fine-tuning of Cn value may still
be needed to account for board parasitics. Cn also needs to
be a high-grade cap like X7R with low tolerance. Another
good option is the NPO/COG (class-I) capacitor, featuring
only 5% tolerance and very good thermal characteristics. But
the NPO/COG caps are only available in small capacitance
values. In order to use such capacitors, the resistors and
thermistors surrounding the droop voltage sensing and
droop amplifier need to be scaled up 10X to reduce the
capacitance by 10X. Attention needs to be paid in balancing
the impedance of droop amplifier.
Dynamic Mode of Operation - Compensation
Parameters
The voltage regulator is equivalent to a voltage source equal
to VID in series with the output impedance. The output
impedance needs to be 2.1mΩ in order to achieve the
2.1mV/A load line. It is highly recommended to design the
compensation such that the regulator output impedance is
2.1mΩ. A type-III compensator is recommended to achieve
the best performance. Intersil provides a spreadsheet to
design the compensator parameters. Figure 13 shows an
example of the spreadsheet. After the user inputs the
parameters in the blue font, the spreadsheet will calculate
the recommended compensator parameters (in the pink
font), and show the loop gain curves and the regulator output
impedance curve. The loop gain curves need to be stable for
regulator stability, and the impedance curve needs to be
equal to or smaller than 2.1mΩ in the entire frequency range
to achieve good transient response.
The user can choose the actual resistor and capacitor values
based on the recommendation and input them in the
spreadsheet, then see the actual loop gain curves and the
regulator output impedance curve.
Caution needs to be used in choosing the input resistor to
the FB pin. Excessively high resistance will cause an error to
the output voltage regulation due to the bias current flowing
in the FB pin. It is recommended to keep this resistor below
3k.
Droop using Discrete Resistor Sensing -
Static/Dynamic Mode of Operation
Figure 3 shows a detailed schematic using discrete resistor
sensing of the inductor current. Figure 14 shows the
equivalent circuit. Since the current sensing resistor voltage
represents the actual inductor current information, Rs and Cn
simply provide noise filtering. The most significant noise
comes from the ESL of the current sensing resistor. A low
low ESL sensing resistor is strongly recommended. The
recommended Rs is 100Ω and the recommended Cn is
220pF. Since the current sensing resistance does not
appreciably change with temperature, the NTC network is
not needed for thermal compensation.
Droop is designed the same way as the DCR sensing
approach. The voltage on the current sensing resistor is
given by the following Equation 28:
Vrsen = Rsen ⋅ I o
(EQ. 28)
Equation 21 shows the droop amplifier gain. So the actual
droop is given by Equation 29:
Rdroop
=
Rsen
⋅ ⎜⎜⎝⎛1 +
Rdrp 2
Rdrp1
⎟⎟⎠⎞
(EQ. 29)
Solving for Rdrp2 yields:
Rdrp 2
=
Rdrp1 ⋅ ⎜⎜⎝⎛
Rdroop
Rsen
−1⎟⎟⎠⎞
(EQ. 30)
For example: Rdroop = 2.1mΩ. If Rsen = 1m and Rdrp1 = 1k,
easy calculation gives that Rdrp2 is 1.1k.
The current sensing traces should be routed directly to the
current sensing resistor pads for accurate measurement.
However, due to layout imperfections, the calculated Rdrp2
may still need slight adjustment to achieve optimum load line
slope. It is recommended to adjust Rdrp2 after the system
has achieved thermal equilibrium at full load.
22
FN6354.3
November 5, 2009