ISL6306 Datasheet, PDF (28/33 Pages) Intersil Corporation – 4-Phase PWM Controller with 8-Bit DAC Code Capable of Precision rDS ON or DCR Differential Current Sensing

ISL6306
from Equations 25, 26, and 27. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process involving repetitive
solutions to the loss equations for different MOSFETs and
different switching frequencies.
P_UP,4 ≈ r_DS(ON)
⎛
⎜
⎝
-I-^M---⎟⎞
N⎠
2
d
+
-I-^P----^---^P2--
12
d
(EQ. 28)
Current Sensing Resistor
The resistors connected between these pins and the
respective phase nodes determine the gains in the load-line
regulation loop and the channel-current balance loop as well
as setting the overcurrent trip point. Select values for these
resistors based on the room temperature r_DS(ON) of the
lower MOSFETs, DCR of inductor or additional resistor; the
full-load operating current, I_FL; and the number of phases, N
using Equation 29.
R_ISEN
=
7----0----R-×^{---1-X--0----–--6--}
I--_F----L-
N
(EQ. 29)
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistor. When the components of
one or more channels are inhibited from effectively
dissipating their heat so that the affected channels run hotter
than desired, choose new, smaller values of R_ISEN for the
affected phases (see the section entitled “Channel-Current
Balance” on page 15). Choose R_ISEN2 in proportion to the
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
R _{I S E N ,2}
=
R_ISEN
Δ_-----T----2-
ΔT₁
(EQ. 30)
In Equation 30, make sure that ΔT₂ is the desired temperature
rise above the ambient temperature, and ΔT₁ is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 30 is usually
sufficient, it may occasionally be necessary to adjust R_ISEN
two or more times to achieve optimal thermal balance
between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labelled R_FB in Figure 8.
Its value depends on the desired full load droop voltage
(V_DROOP in Figure 8). If Equation 29 is used to select each
ISEN resistor, the load-line regulation resistor is as shown in
Equation 31.
R_FB
=
-V----^D----^R----^O-----^O----^P--
70 ×10^–6
(EQ. 31)
If one or more of the ISEN resistors is adjusted for thermal
balance, as in Equation 30, the load-line regulation resistor
should be selected according to Equation 32 where I_FL is the
full-load operating current and R_ISEN(n) is the ISEN resistor
connected to the n^th ISEN pin.
∑ ^R_FB
=
----V-----^D----^R----^O-----^O----^P------
I_FL r_DS(ON)
R_ISEN(n)
n
(EQ. 32)
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter LC resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R_C and C_C.
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the LC
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
C₂ (OPTIONAL)
R_C ^CC
COMP
R_FB
+
V_DROOP
-
FB
IDROOP
VDIFF
FIGURE 19. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6306 CIRCUIT
The feedback resistor, R_FB, has already been chosen as
outlined in “Load-Line Regulation Resistor” on page 28.
Select a target bandwidth for the compensated system, f₀.
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f₀
to the LC pole frequency and the ESR zero frequency. For
each of the three cases which follow, there is a separate set
of equations for the compensation components.
28
FN9226.1
May 5, 2008