ISL6306 Datasheet, PDF (12/33 Pages) Intersil Corporation – 4-Phase PWM Controller with 8-Bit DAC Code Capable of Precision rDS ON or DCR Differential Current Sensing

ISL6306
When configured for r_DS(ON) current sensing, the ISEN1-,
ISEN2-, ISEN3-, and ISEN4- pins are grounded at the lower
MOSFET sources. The ISEN1+, ISEN2+, ISEN3+, and
ISEN4+ pins are then held at a virtual ground. Therefore, a
resistor, connected between these current sense pins and
the drain terminals of the associated lower MOSFET, will
carry the current proportional to the current flowing through
that channel. The sensed current is determined by the
negative voltage across the lower MOSFET when it is ON,
which is the channel current scaled by r_DS(ON) and R_ISEN.
VR_RDY
VR_RDY indicates that the soft-start is completed and the
output voltage is within the regulated range around VID
setting. It is an open-drain logic output. When OCP or OVP
occurs, VR_RDY will be pulled to low. It will also be pulled
low if the output voltage is below the undervoltage threshold.
OFS
The OFS pin provides a means to program a DC offset
current for generating a DC offset voltage at the REF input.
The offset current is generated via an external resistor and
precision internal voltage references. The polarity of the
offset is selected by connecting the resistor to GND or VCC.
For no offset, the OFS pin should be left unterminated.
TCOMP
Temperature compensation scaling input. The voltage
sensed on the TM pin is utilized as the temperature input to
adjust ldroop and the overcurrent protection limit to
effectively compensate for the temperature coefficient of the
current sense element. To implement the integrated
temperature compensation, a resistor divider circuit is
needed with one resistor being connected from TCOMP to
VCC of the controller and another resistor being connected
from TCOMP to GND. Changing the ratio of the resistor
values will set the gain of the integrated thermal
compensation. When integrated temperature compensation
function is not used, connect TCOMP to GND.
IDROOP
IDROOP is the output pin of sensed average channel
current which is proportional to load current. In the
application which does not require loadline, leave this pin
open. In the application which requires load line, connect
this pin to FB so that the sensed average current will flow
through the resistor between FB and VDIFF to create a
voltage drop which is proportional to load current.
TM
TM is an input pin for VR temperature measurement.
Connect this pin through NTC thermistor to GND and a
resistor to VCC of the controller. The voltage at this pin is
reverse proportional to VR temperature. ISL6306 monitors
the VR temperature based on the voltage at TM pin and
outputs VR_HOT and VR_FAN signals.
VR_HOT
VR_HOT is used as an indication of high VR temperature. It
is an open-drain logic output. It will be open when the
measured VR temperature reaches a certain level.
VR_FAN
VR_FAN is an output pin with open-drain logic output. It will
be open when the measured VR temperature reaches a
certain level.
Operation
Multiphase Power Conversion
Microprocessor load current profiles have changed to the
point that the advantages of multiphase power conversion
are impossible to ignore. The technical challenges
associated with producing a single-phase converter which is
both cost-effective and thermally viable have forced a
change to the cost-saving approach of multiphase. The
ISL6306 controller helps reduce the complexity of
implementation by integrating vital functions and requiring
minimal output components. The block diagrams on pages
4, 5, 6 and 7 provide top level views of multiphase power
conversion using the ISL6306 controller.
Interleaving
The switching of each channel in a multiphase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 3-phase converter, each channel switches 1/3
cycle after the previous channel and 1/3 cycle before the
following channel. As a result, the 3-phase converter has a
combined ripple frequency three times greater than the
ripple frequency of any one phase. In addition, the peak-to-
peak amplitude of the combined inductor currents is reduced
in proportion to the number of phases (Equations 1 and 2).
Increased ripple frequency and lower ripple amplitude mean
that the designer can use less per-channel inductance and
lower total output capacitance for any performance
specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (IL1, IL2, and IL3)
combine to form the AC ripple current and the DC load
current. The ripple component has three times the ripple
frequency of each individual channel current. Each PWM
pulse is terminated 1/3 of a cycle after the PWM pulse of the
previous phase. The peak-to-peak current for each phase is
about 7A, and the DC components of the inductor currents
combine to feed the load.
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FN9226.1
May 5, 2008