ISL6306 Datasheet, PDF (16/33 Pages) Intersil Corporation – 4-Phase PWM Controller with 8-Bit DAC Code Capable of Precision rDS ON or DCR Differential Current Sensing

ISL6306
+
V_COMP
-
FILTER f(jω)
+
-
SAWTOOTH SIGNAL
I_ER
I_AVG
÷N
Σ
-
+
PWM1
I₄ *
I₃ *
I₂
I₁
NOTE: *Channels 3 and 4 are optional for 2 or 3 phase designs.
FIGURE 7. CHANNEL 1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
Channel current balance is essential in achieving the
thermal advantage of multiphase operation. With good
current balance, the power loss is equally dissipated over
multiple devices and a greater area.
Voltage Regulation
The compensation network shown in Figure 8 assures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6306 to include the combined tolerances of each of
these elements.
The output of the error amplifier (V_COMP) is compared to the
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Intersil MOSFET drivers and
regulate the converter output to the specified reference
voltage. The internal and external circuitry, which control
voltage regulation, are illustrated in Figure 8.
The ISL6306 incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the local controller ground reference point
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
inverting input, V_SEN, and inverting input, RGND, of the
remote-sense amplifier. The remote-sense output (V_DIF), is
connected to the inverting input of the error amplifier through
an external resistor.
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the 8 6-bit logic signal
(VID) into one of the discrete voltages shown in Table 1.
Each VID input offers a 45µA pull-up to an internal 2.5V
source for use with open-drain outputs. The pull-up current
diminishes to zero above the logic threshold to protect
voltage-sensitive output devices. External pull-up resistors
can augment the pull-up current sources if case leakage into
the driving device is greater than 45µA.
EXTERNAL CIRCUIT
R_C C_{C COMP}
R_REF
C_REF
DAC
REF
FB
R_FB
+
V_DROOP
-
IDROOP
V_DIFF
ISL6306 INTERNAL CIRCUIT
I_AVG
+
-
V_COMP
ERROR AMPLIFIER
V_OUT+
VSEN
+
V_OUT-
RGND
-
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 8. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
16
FN9226.1
May 5, 2008