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X9520 Datasheet, PDF (27/33 Pages) Intersil Corporation – Triple DCP, POR,2kbit EEPROM Memory, Dual Voltage Monitors
X9520
VTRIPX (X=1,2,3) PROGRAMMING PARAMETERS (See Figure 33)
Parameter
Description
tVPS
tVPH
tTSU
tTHD
tVPO
VTRIPx Program Enable Voltage Setup time
VTRIPx Program Enable Voltage Hold time
VTRIPx Setup time
VTRIPx Hold (stable) time
VTRIPx Program Enable Voltage Off time
(Between successive adjustments)
twc
VTRIPx Write Cycle time
VP
Programming Voltage
Vta
VTRIPx Program Voltage accuracy
(Programmed at 25oC.)
Vtv
VTRIP Program variation after programming (-40 - 85oC).
(Programmed at 25oC.)
Min
10
10
10
10
1
10
-100
Typ Max
5
10
15
+100
Units
µs
µs
µs
µs
ms
ms
V
mV
-25
+10 +25
mV
Notes: The above parameters are not 100% tested.
V1RO, V2RO, V3RO OUTPUT TIMING. (See Figure 30, Figure 31, Figure 32)
Symbol
tPURST (5)
tMRD
(31)(2)(5)
tMRDPW(5)
tRPDx (5)
tFx (5)
tRx (5)
VRVALID (5)
Description
Power On Reset delay time
MR to V1RO propagation delay
Condition
POR1 = 0, POR0 = 0
POR1 = 0, POR0 = 1
POR1 = 1, POR0 = 0
POR1 = 1, POR0 = 1
See (1)(2)(4)
MR pulse width
V1 / Vcc, V2, V3 to V1RO,
V2RO, V3RO propagation
delay (respectively)
V1 / Vcc, V2, V3 Fall Time
V1 / Vcc, V2, V3 Rise Time
V1 / Vcc for V1RO, V2RO,
V3RO Valid (3).
Min.
25
50
100
150
500
20
20
1
Typ.
50
100
200
300
Max.
75
150
300
450
5
Units
ms
ms
ms
ms
µs
ns
20
µs
mV/µs
mV/µs
V
Notes: 1. See Figure 31 for timing diagram.
Notes: 2. See Figure 25 for equivalent load.
Notes: 3. This parameter describes the lowest possible V1 / Vcc level for which the outputs V1RO, V2RO, and V3RO will be correct with respect to
their inputs (V1 / Vcc, V2, V3).
Notes: 4. From MR rising edge crossing VIH, to V1RO rising edge crossing VOH.
Notes: 5. The above parameters are not 100% tested.
27
FN8206.0
March 8, 2005