X9520 Datasheet, PDF (1/33 Pages) Intersil Corporation – Triple DCP, POR,2kbit EEPROM Memory, Dual Voltage Monitors

®
PRELIMINARY
X9520
Fiber Channel/Gigabit Ethernet Laser Diode Control for Fiber Optic Modules
Data Sheet
March 8, 2005
FN8206.0
Triple DCP, POR, 2kbit EEPROM Memory,
Dual Voltage Monitors
FEATURES
• Three Digitally Controlled Potentiometers (DCPs)
—64 Tap - 10kΩ
—100 Tap - 10kΩ
—256 Tap - 100kΩ
— Nonvolatile
—Write Protect Function
• 2kbit EEPROM Memory with Write Protect & Block
Lock^TM
• 2-Wire industry standard Serial Interface
—Complies to the Gigabit Interface Converter
(GBIC) specification
• Power-on Reset (POR) Circuitry
—Programmable Threshold Voltage
—Software Selectable reset timeout
—Manual Reset
• Two Supplementary Voltage Monitors
—Programmable Threshold Voltages
• Single Supply Operation
—2.7V to 5.5V
• Hot Pluggable
• 20 Pin packages
—CSP (Chip Scale Package)
— TSSOP
DESCRIPTION
The X9520 combines three Digitally Controlled Potenti-
ometers (DCPs), V1 / Vcc Power-on Reset (POR) cir-
cuitry, two programmable voltage monitor inputs with
software and hardware indicators, and integrated
EEPROM with Block Lock™ protection. All functions of
the X9520 are accessed by an industry standard 2-Wire
serial interface.
Two of the DCPs of the X9520 may be utilized to control
the bias and modulation currents of the laser diode in a
Fiber Optic module. The third DCP may be used to set
other various reference quantities, or as a coarse trim
for one of the other two DCPs. The 2kbit integrated
EEPROM may be used to store module definition data.
The programmable POR circuit may be used to ensure
that V1 / Vcc is stable before power is applied to the
laser diode / module. The programmable voltage moni-
tors may be used for monitoring various module alarm
levels.
The features of the X9520 are ideally suited to simplify-
ing the design of fiber optic modules which comply to
the Gigabit Interface Converter (GBIC) specification.
The integration of these functions into one package sig-
nificantly reduces board area, cost and increases reli-
ability of laser diode modules.
BLOCK DIAGRAM
WP
SDA
SCL
MR
V3
V2
V1 / Vcc
DATA
REGISTER
COMMAND
DECODE &
CONTROL
LOGIC
THRESHOLD
RESET LOGIC
8
PROTECT LOGIC
CONSTAT
REGISTER
4
2kbit
EEPROM
ARRAY
2
-
VTRIP₃
+
-
VTRIP ₂
+
+
VTRIP₁
-
WIPER
COUNTER
REGISTER
6 - BIT
NONVOLATILE
MEMORY
WIPER
COUNTER
REGISTER
7 - BIT
NONVOLATILE
MEMOR Y
WIPER
COUNTER
REGISTER
8 - BIT
NONVOLATILE
MEMOR Y
POWER-ON /
LOW VOLTAGE
RESET
GENERATION
R_H0
R_W0
R_L0
R_H1
R_W1
R_L1
R_H2
R_W2
R_L2
V3RO
V2RO
V1RO
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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