X9520 Datasheet, PDF (24/33 Pages) Intersil Corporation – Triple DCP, POR,2kbit EEPROM Memory, Dual Voltage Monitors

X9520
D.C. OPERATING CHARACTERISTICS
Symbol
I_CC1(1)
Parameter
Current into V_CC Pin
(X9520: Active)
Read memory array ⁽³⁾
Write nonvolatile memory
I_CC2(2)
Current into V_CC Pin
(X9520:Standby)
With 2-Wire bus activity ⁽³⁾
No 2-Wire bus activity
Input Leakage Current (SCL, SDA, MR)
I_LI
Input Leakage Current (WP)
I_ai
Analog Input Leakage
I_LO
V_TRIP1PR
V_TRIPxPR
V_TRIP1 ⁽⁶⁾
V_TRIP2 ⁽⁶⁾
V_TRIP3 ⁽⁶⁾
I_Vx
V_IL ⁽⁷⁾
V_IH ⁽⁷⁾
V_OLx
Output Leakage Current (SDA, V1RO,
V2RO, V3RO)
V_TRIP1 Programming Range
V_TRIPx Programming Range (x=2,3)
Pre - programmed V_TRIP1 threshold
Pre - programmed V_TRIP2 threshold
Pre - programmed V_TRIP3 threshold
V2 Input leakage current
V3 Input leakage current
Input LOW Voltage (SCL, SDA, WP, MR)
Input HIGH Voltage (SCL,SDA, WP, MR)
V1RO, V2RO, V3RO, SDA Output Low
Voltage
Min Typ
0.1
1
0.1
2.75
1.8
2.85 3.0
4.55 4.7
1.65 1.8
2.85 3.0
1.65 1.8
2.85 3.0
-0.5
2.0
Max
0.4
1.5
50
50
10
10
10
10
4.70
4.70
3.05
4.75
1.85
3.05
1.85
3.05
1
1
0.8
V_CC
+0.5
0.4
Unit
Test Conditions / Notes
mA ^{fSCL = 400kHz}
V_SDA = V_CC
MR = Vss
µA WP = Vss or Open/Floating
V_SCL= V_CC (when no bus
activity else f_SCL = 400kHz)
µA V_IN ⁽⁴⁾ = GND to V_CC.
µA
µA
V_IN = V_SS to V_CC with all other
analog inputs floating
µA
V_OUT ⁽⁵⁾ = GND to V_CC.
X9520 is in Standby⁽²⁾
V
V
V
Factory shipped default option A
Factory shipped default option B
V
Factory shipped default option A
Factory shipped default option B
V
Factory shipped default option A
Factory shipped default option B
µA
V_SDA = V_SCL = V_CC
Others=GND or V_CC
V
V
V I_SINK = 2.0mA
Notes: 1. The device enters the Active state after any START, and remains active until: 9 clock cycles later if the Device Select Bits in the Slave
Address Byte are incorrect; 200nS after a STOP ending a read operation; or t_WC after a STOP ending a write operation.
Notes: 2. The device goes into Standby: 200nS after any STOP, except those that initiate a high voltage write cycle; t_WC after a STOP that ini-
tiates a high voltage cycle; or 9 clock cycles after any START that is not followed by the correct Device Select Bits in the Slave Address
Byte.
Notes: 3. Current through external pull up resistor not included.
Notes: 4. V_IN = Voltage applied to input pin.
Notes: 5. V_OUT = Voltage applied to output pin.
Notes: 6. See “ORDERING INFORMATION” on page 33.
Notes: 7. V_IL Min. and V_IH Max. are for reference only and are not tested
24
FN8206.0
March 8, 2005