ISL1801 Datasheet, PDF(27/30 Page) Intersil Corporation – sPMIC for Micro Converter Bias and Drivers

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ISL1801 Datasheet, PDF (27/30 Pages) Intersil Corporation – sPMIC for Micro Converter Bias and Drivers

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ISL1801

Application Circuits (Continued)

PANEL

VIN+

VIN-

ISEN+ ISEN-

ISL2110

HI HO

Half

Bridge

driver

LI ISLEON-

ISL2110

Half

Bridge

driver

VOUT+

Load

MCU

VOUT1

VOUT2

ISEN+

ISEN-

VOUT2

1 NC1

NC6 48

2 NC2

PGND1 47

3 VCC1

NC5 46

4 AGND

VIN1 45

5 OCSET3

NC4 44

6 NC3

PHASE1 43

7 PHASE3

BOOT1 42

8 PGND3

TIMER 41

9 DRIVE3

TON1 40

10 PVCC3

FB1 39

11 BDRIVE

PRELOAD 38

12 PGND4

GND 37

13 PWM3

VCC5V 36

14 RPWM3

BCMD

ISL1801

VIN2 35

BOOT2 34

BRESET

PHASE2 33

WDI

PGND2 32

VDDREF

TON2 31

LATCHRPT

FB2 30

PGOOD2

CMP2+ 29

AMPO

CMP2- 28

AMP-

CMP1O 27

AMP+

CMP1- 26

24 SGND

CMP1+ 25

VCC5V

VIN+

VOUT1 10V

VOUT2 3.3V

FIGURE 31. BUCK-BOOST REGULATOR WITH EXTERNAL HALF BRIDGE DRIVERS

PC Board Layout Guidelines

Careful PC board layout is critical to achieve minimal switching

losses and clean, stable operation. This is especially true when

multiple converters are on the same PC board where one circuit

can affect the other. For specific layout example of the

ISL1801EVAL1ZA evaluation board please contact Intersil sales

support with your needs.

Mount all of the power components on the top side of the board

with their ground terminals flush against one another, if possible.

Follow these guidelines for good PC board layout:

â¢ Isolate the power components on the top side from the

sensitive analog components on the bottom side with a ground

shield. Use a separate PGND plane under the VOUT1 and VOUT2

sections (called PGND1 and PGND2). Avoid the introduction of

AC currents into the PGND1 and PGND2 ground planes. Run

the power plane ground currents on the top side only, if

possible.

â¢ Use a star ground connection on the power plane to minimize

the crosstalk between VOUT1 and VOUT2.

â¢ Keep the high-current paths short, especially at the ground

terminals. This practice is essential for stable, jitter-free

operation.

â¢ Keep the power traces and load connections short. This practice

is essential for high efficiency. Using thick copper PC boards

(2oz vs 1oz) can enhance full-load efficiency by 1% or more.

Correctly routing PC board traces must be approached in terms

of fractions of centimeters, where a single mW of excess trace

resistance causes a measurable efficiency penalty.

â¢ PHASE3 and GND connections to the synchronous rectifiers for

current limiting must be made using Kelvin-sense connections

to guarantee the current-limit accuracy. This is best done by

routing power to the MOSFETs from outside using the top

copper layer, while connecting PHASE traces inside

(underneath) the MOSFETs.

â¢ When trade-offs in trace lengths must be made, it is preferable

to allow the inductor charging path to be made longer than the

Submit Document Feedback 27

FN8259.1

July 24, 2014

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