ISL6353 Datasheet, PDF (24/30 Pages) Intersil Corporation – Multiphase PWM Regulator for VR12 DDR Memory Systems

ISL6353
Figure 14 shows the how the NTC network should be designed to get
correct VR_HOT#/ALERT# behavior when the system temperature
rises and falls, manifested as the NTC pin voltage falling and rising.
The series of events are:
1. The temperature rises so the NTC pin voltage drops. Tzone
value changes accordingly.
2. The temperature crosses the threshold where Tzone register
Bit 6 changes from 0 to 1.
3. The controller changes Status_1 register bit 1 from 0 to 1.
4. The controller asserts ALERT#.
5. The CPU reads Status_1 register value to know that the alert
assertion is due to Tzone register bit 6 flipping.
6. The controller clears ALERT#.
7. The temperature continues rising.
8. The temperature crosses the threshold where Tzone register
Bit 7 changes from 0 to 1.
9. The controllers asserts VR_HOT# signal. The CPU throttles
back and the system temperature starts dropping eventually.
10. The temperature crosses the threshold where Tzone register
bit 6 changes from 1 to 0. This threshold is 1 ADC step lower
than the one when VR_HOT# gets asserted, to provide 3%
hysteresis.
11. The controllers de-asserts VR_HOT# signal.
12. The temperature crosses the threshold where Tzone register
bit 5 changes from 1 to 0. This threshold is 1 ADC step lower
than the one when ALERT# gets asserted during the
temperature rise to provide 3% hysteresis.
13. The controller changes Status_1 register bit 1 from 1 to 0.
14. The controller asserts ALERT#.
15. The CPU reads Status_1 register value to know that the alert
assertion is due to Tzone register bit 5 flipping.
16. The controller clears ALERT#.
Table 5 summarizes the fault protection functionality.
TABLE 5. FAULT PROTECTION SUMMARY
FAULT TYPE
FAULT DURATION
BEFORE
PROTECTION
PROTECTION
ACTION
FAULT
RESET
Overcurrent
Phase Current
Unbalance
120µs
1ms
PWM tri-state,
VR_ON
PGOOD latched low toggle or
VDD toggle
Way-Overcurrent
(1.5xOC)
Immediately
Overvoltage
+175mV
PGOOD latched low.
Actively pulls the
output voltage to
below VID value,
then tri-state.
FB2 Function
CONTROLLER IN
3 OR 2-PHASE
MODE
C1 R2
C2.1 _R3.1
C3
CONTROLLER IN
PS1 OR PS2
MODE
C2.1 _R3.1
C1 R2
C3
VSEN
R1
C2.2 _R3.2
FB
E/A
FB2
Vref
VSEN
COMP
R1
C2.2 _R3.2
FB
E/A
FB2
Vref
FIGURE 15. FB2 FUNCTION IN 2-PHASE MODE
COMP
Figure 15 shows the FB2 function. In order to improve transient
response and stability when phases are disabled in PS1 or PS2
mode, the ISL6353 FB2 function allows a second type 3
compensation network to be connected from the output voltage
to the FB pin.
In PS0 mode of operation the FB2 switch is open (off). In PS1 or
PS2 mode of operation the FB2 switch closes (on).
The FB2 function ensures excellent transient response in both
PS0 mode and PS1/2 mode. If the FB2 function is not needed
C2.2 and R3.2 can be unpopulated and the FB2 pin can be left
unconnected.
Adaptive Body Diode Conduction Time
Reduction
In DCM, the controller turns off the low-side MOSFET when the
inductor current approaches zero. During the on-time of the
low-side MOSFET, the phase voltage is negative and the amount
is the MOSFET r_DS(ON) voltage drop, which is proportional to the
inductor current. A phase comparator inside the controller
monitors the phase voltage during on-time of the low-side
MOSFET and compares it with a threshold to determine the
zero-crossing point of the inductor current. If the inductor current
has not reached zero when the low-side MOSFET turns off, it will
flow through the low-side MOSFET body diode, causing the phase
node to have a larger voltage drop until it decays to zero. If the
inductor current has crossed zero and reversed the direction
when the low-side MOSFET turns off, it will flow through the
high-side MOSFET body diode, causing the phase node to have a
spike until the current decays to zero. The controller continues
monitoring the phase voltage after turning off the low-side
MOSFET and adjusts the phase comparator threshold voltage
accordingly in iterative steps such that the low-side MOSFET body
diode conducts for approximately 40ns to minimize the body
diode-related loss.
System Parameter Programming PROG1/2
Pins
ISL6353 has two system parameter programming pins PROG1
and PROG2. Some system parameters, such as maximum output
current, boot voltage, number of phases for PS1 state, can be
programmed by changing the resistors connected to these three
pins.
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September 15, 2011
FN6897.0