ISL5217_05 Datasheet, PDF (24/43 Pages) Intersil Corporation – Quad Programmable Up Converter

Waveforms (Continued)
ISL5217
CLK
IN<19:0>,
QIN<19:0>
t_IQISC
t_SDC
VALID
t_IQIHC
VALID
SYNCO
t_IDC
ISTRB
P<15:0>
UPDX,
TXENX
t_PDC
VALID
t_USC, t_TSC
t_UHC, t_THC
FIGURE 21. INPUT/OUTPUT TIMING
CLK
t_IQIE
IIN<19:0>,
QIN<19:0>
t_IQID
t_IQIDC
OUTEN<1:0>
t_IQOD
IOUT<19:0>,
QOUT<19:0>
t_IQOE
t_IQODC
FIGURE 22. ENABLE/DISABLE TIMING
CLK
IIN<19:0>,
QIN<19:0>,
IOUT<19:0>,
QOUT<19:0>
t_IQVC2X
FIGURE 23. MUXED IQ AT 2X OUTPUT TIMING
CLK
t_SVC1X
SCLKX
FIGURE 24. SCLKX OUTPUT TIMING IN 1X MODE
RD
t_WPWL
t_WPWH
WR
t_CSW
t_CHW
CS
A<6:0>
P<15:0>
VALID
VALID
t_ASW
t_AHW
t_PSW
t_PHW
FIGURE 25. MICROPROCESSOR WRITE TIMING (RDMODE = 0)
RD (RD/WR)
WR (DS)
CS
A<6:0>
P<15:0>
t_RSW1
t_WPWL1
t_CSW1
t_ASW1
VALID
t_PSW1
VALID
t_RHW1
t_CHW1
t_AHW1
t_PHW1
FIGURE 26. MICROPROCESSOR WRITE TIMING (RDMODE = 1)
24
FN6004.3
July 8, 2005