ISL28022 Datasheet, PDF (24/28 Pages) Intersil Corporation – Precision Digital Power Monitor

ISL28022
The V_SHUNT measurement error degrades at ECLK frequencies
above 4MHz. It is recommended that the ECLK does not exceed
4MHz. At ECLK frequencies below 2.5MHz or internal clock
frequencies of 208kHz, the clock frequency to modulator is too
slow allowing the charged capacitors to discharge due to
parasitic leakages. The capacitor discharge results in a
measurement error.
Over-ranging
It is not recommended to operate the ISL28022 outside the set
voltage range. In the event of measuring a shunt voltage beyond
the maximum set range (300mV) and lower than the clamp
voltage of the protection diode (1V), the measured output
reading may be within the accepted range but will be incorrect.
Typical Applications
Vrail = 0 to 60V
VOUT
VINP
Voltage
Regulator
Sense
VINM
ISL28022 DPM
VCC
ADC
16-Bit
GND
VBUS
SCL
EN
VOUT
SDA
ECLK/INT
REG
A0
MAP
A1
digitally via a register. The ISL28022 allows for the summation of
error detection bits to be routed to an interrupt pin. For the Point
Of Load Monitoring circuit shown in Figure 37, the interrupt pin is
connected to the enable pin of the regulator. In a fault condition,
the ISL28022 will trigger an interrupt causing the voltage
regulator to shutdown. In the case of when a fault always exist,
the ISL28022 interrupt pin output state can be digitally
programmed.
The ISL28022 calculates the power and current through
hardware and stores the results in an internal register. The V_bus
connected directly to the load enables a measurement system
that monitors power to the load.
FROM ECLK/INT
FSEL
EN
SS
VRAIL = 2.3V
TO 5V
VDD _REF
OSC
GEN
CNTRL
EN
LX
PWM FET
CNTRL DRIVE
GND
VOUT =12V
COMP
FB
ISL97516
TO EN
FIGURE 37. POINT OF LOAD MONITORING DESIGN IDEA
Point Of Load Power Monitor
Complex systems are subdivided into smaller simplified specific
tasks. The circuit illustrated in Figure 37 is a solution that can be
used to monitor a load’s performance. The Vreg is a voltage
regulator that regulates to a point of load (POL) voltage. 5V, 3.3V,
2.5V and 1.8V are examples of POL voltages.
The main bus voltage applied to the voltage regulator regulates
the voltage to the load at the VINM, VBUS and Sense node for the
configuration shown above. The placement of the shunt resistor
in the circuit allows current to be monitored while regulating the
voltage to the load. The maximum shunt voltage the ISL28022 is
able to measure is ± 300mV. The shunt resistor value is
determined by the Equation 11.
0.30
R _shunt RSH _{Current FS}
(EQ. 11)
Current_FS is the maximum current to be measured through the
load. This is chosen by the user.
The ISL28022 has over/undervoltage (OV/UV) sensing circuitry
for the Bus and Shunt inputs. The levels of the error detection
circuitry are controlled digitally via a I²C/SMBus communication
protocol. The status of each inputs’ error detection can be read
I²C
SMBUS
TO µC
FIGURE 38. POWER MONITOR BOOST REGULATOR DESIGN IDEA
Power Monitor Boost Regulation
The Power Monitor Boost Regular application is an example of
the ISL28022 used as a digital helper, Figure 38. With minimal
circuitry, the ISL28022 enables smart designs that digitally
monitor the electrical parameters to a load. Alternative designs
require a current amplifier paired with an ADC. The ADC chosen
is often not compliant to common communication standards,
such as I²C. The ISL28022 solves this problem and allows for 16
devices on a single I²C bus.
The ISL97516 chip is a high efficiency step-up voltage regulator.
The max current the regulator can deliver is 2.0A. For this
particular application, the ISL97516 is configured to step up the
voltage at the VDD pin to 12V. The voltage at VDD can range from
2.3V to 5V for normal 12V regulated operation. A USB power pin
could be used to drive the ISL97516.
24
FN8386.1
April 26, 2013