ISL28022 Datasheet, PDF (17/28 Pages) Intersil Corporation – Precision Digital Power Monitor

ISL28022
3. From Equation 3, the calibration resister value is calculated
using Equation 4. The resolution of the math that is processed
internally in the DPM is 4096 or 12 bits of resolution. The
Vshunt LSB is set to 10µV. Equation 4 yields a 16-bit binary
number that can be written to the calibration register. The
calibration register format is represented in Table 14.
⎡ ^Math res^⋅Vshunt LSB⎤
CalReg_val integer_{⎢⎣(CurrentLSB⋅Rshunt)⎥⎦}
CalReg_val integer^{⎡⎢⎣}_(Curren0t.0L⁴_S⁰_B⁹_{⋅R6shunt)}^{⎤⎥⎦}
(EQ. 4)
CURRENT REGISTER 04H (READ-ONLY)
Once the calibration register (05H) is programmed, the output
current is calculated using Equation 5.
Current
⎡ ¹⁵
⎤
∑ ^{( ) ⎢}
⎢
Bit_n⋅Bit_Weight _n
⎥ _{⋅ Current}
⎥
LSB
⎣^{n = 0}
⎦
(EQ. 5)
Bit is the returned value of each bit from the current register
either 1 or a 0. The weight of each bit is represented in Table 15.
N is the bit number. The current LSB is the value calculated from
Equation 3.
POWER REGISTER 03H (READ-ONLY)
The Power register only has meaning if the calibration register
(05H) is programmed. The units for the power register are in
watts. The power is calculated using Equation 6.
Power
∑ ^{( ) ⎡}
⎢
15
⎢
Bit_n⋅Bit_Weight _n
⎤
⎥
⋅Power
⎥
LSB^⋅5000
⎣^{n = 0}
⎦
(EQ. 6)
Bit is the returned value of each bit from the power register either
1 or a 0. The weight of each bit is represented in Table 16. N is
the bit number. The power LSB is calculated from Equation 7.
Power _LSB Current _LSB⋅Vbus _LSB
(EQ. 7)
If V_bus range, BRNG, is set to 60V, the power equation in
Equation 6 is multiplied by 2.
TABLE 15. CURRENT REGISTER, 04h
Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
NAME Bit 15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
WEIGHT -32768 16384 8192 4096 2048 1024 512 256 128 64
32
16
8
4
2
1
Bit
NAME
WEIGHT
D15 D14
PD15 PD14
32768 16384
D13
PD13
8192
D12
PD12
4096
TABLE 16. POWER REGISTER, 03h
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
2048 1024 512 256 128 64 32 16 8
4
2
1
THRESHOLD REGISTERS
The shunt voltage or V_bus threshold registers are used to set the
Min/Max threshold limits that will be tested versus V_SHUNT or
V_bus readings. Measurement readings exceeding the respective
Vshunt or V_bus limits, either above or below, will set a register
flag and perhaps an external interrupt depending on the
configuration of the interrupt enable bit (INTREN) in register 09H.
The testing of the ADC reading versus the respective threshold
limits occurs once per ADC conversion.
TABLE 17. SHUNT VOLTAGE THRESHOLD REGISTER, 06h
Bit D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
NAME Sign SMX6 SMX5 SMX4 SMX3 SMX2 SMX1 SMX0 Sign SMN6 SMN5 SMN4 SMN3 SMN2 SMN1 SMN0
WEIGHT -128 64 32 16
8
4
2
1 -128 64 32 16
8
4
2
1
SHUNT VOLTAGE THRESHOLD REGISTER 06H
(READ/WRITE)
The V_SHUNT minimum and maximum threshold limits are set
using one register. The shunt value readings are either positive or
negative. D15 and D7 bits of Table 17 are given to represent the
sign of the limit. SMX bits represent the upper limit threshold.
SMN represents the lower threshold limit. Equation 8 is the
calculation used to convert the V_SHUNT threshold binary value to
decimal. Bit is the value of each bit set in the shunt threshold
register. The value is either 1 or a 0. The weight of each bit is
represented in Table 17. N is the bit number. The shunt voltage
threshold LSB is 2.56mV.
Vs _thresh
∑ ^{( ) ⎡⎢ 7}
⎢
Bit_n⋅Bit_Weight _n
⎤⎥ _{⋅ VsThresh}
⎥
LSB
⎣^{n = 0}
⎦
(EQ. 8)
17
FN8386.1
April 26, 2013