ISL12027 Datasheet, PDF (22/28 Pages) Intersil Corporation – Real Time Clock/Calendar with EEPROM

ISL12027
S
S
SIGNALS FROM
THE MASTER
T
A
SLAVE
R ^ADDRESS
T
WORD
ADDRESS 1
WORD
ADDRESS 0
T
A _SLAVE
R
T
ADDRESS
S
T
O
P
SDA BUS
SIGNALS FROM
THE SLAVE
1
1 11 0 00 00000
A
A
C
C
K
K
1
A
C
K
1 1 11
A
C
K
DATA
FIGURE 25. RANDOM ADDRESS READ SEQUENCE
SIGNALS FROM
THE MASTER
SDA BUS
SIGNALS FROM
THE SLAVE
S
SLAVE
A
A
A
T
ADDRESS
C
C
C
O
K
K
K
P
1
A
C
DATA
K
(1)
DATA
(2)
DATA
(n-1)
DATA
(n)
(n is any integer greater than 1)
FIGURE 26. SEQUENTIAL READ SEQUENCE
Application Section
Crystal Oscillator and Temperature Compensation
Intersil has now integrated the oscillator compensation
circuity on-chip, to eliminate the need for external
components and adjust for crystal drift over temperature and
enable very high accuracy time keeping (<5ppm drift).
The Intersil RTC family uses an oscillator circuit with on-chip
crystal compensation network, including adjustable load-
capacitance. The only external component required is the
crystal. The compensation network is optimized for operation
with certain crystal parameters which are common in many
of the surface mount or tuning-fork crystals available today.
Table 7 summarizes these parameters.
Table 8 contains some crystal manufacturers and part
numbers that meet the requirements for the Intersil RTC
products.
The turnover temperature in Table 7 describes the
temperature where the apex of the of the drift vs.
temperature curve occurs. This curve is parabolic with the
drift increasing as (T-T0)². For an Epson MC-405 device, for
example, the turnover temperature is typically 25°C, and a
peak drift of >110ppm occurs at the temperature extremes of
-40 and +85°C. It is possible to address this variable drift by
adjusting the load capacitance of the crystal, which will result
in predictable change to the crystal frequency. The Intersil
RTC family allows this adjustment over temperature since
the devices include on-chip load capacitor trimming. This
control is handled by the Analog Trimming Register, or ATR,
which has 6 bits of control. The load capacitance range
covered by the ATR circuit is approximately 3.25pF to
18.75pF, in 0.25pF increments. Note that actual capacitance
would also include about 2pF of package related
capacitance. In-circuit tests with commercially available
crystals demonstrate that this range of capacitance allows
frequency control from +116ppm to -37ppm, using a 12.5pF
load crystal.
In addition to the analog compensation afforded by the
adjustable load capacitance, a digital compensation feature
is available for the Intersil RTC family. There are three bits
known as the Digital Trimming Register or DTR, and they
operate by adding or skipping pulses in the clock signal. The
range provided is ±30ppm in increments of 10ppm. The
default setting is 0ppm. The DTR control can be used for
coarse adjustments of frequency drift over temperature or for
crystal initial accuracy correction.
22
FN8232.4
October 18, 2006