ICL8052 Datasheet, PDF (18/21 Pages) Intersil Corporation – 14-Bit/16-Bit, Microprocessor- Compatible, 2-Chip, A/D Converter

ICL8052/ICL7104, ICL8068/ICL7104
INTEGRATOR OUTPUT
INTERNAL CLOCK
ZERO-CROSSING OCCURS
ZERO-CROSSING DETECTED
FOR -16 MBEN SEQUENCE INSERTED HERE
INTERNAL LATCH
STATUS OUTPUT
MODE INPUT
INTERNAL MODE
UART
NORM
SEN INPUT
SEN
SENSED
SEN
SENSED
TERMINATES
UART MODE
CE/LOAD
HBEN
HIGH BYTE DATA
MODE LOW NOT IN HANDSHAKE MODE
DISABLES OUTPUTS CE/LD, HBEN, MBEN, LBEN
DATA VALID
LBEN
LOW BYTE DATA
LBEN
LOW BYTE DATA
DATA VALID
MODE HIGH ACTIVATES
CE/LD, HBEN, LBEN
DON’T CARE
THREE-STATE HIGH IMPEDANCE
FIGURE 11. HANDSHAKE WITH SEN HELD POSITIVE
DATA VALID
THREE-STATE WITH PULLUP
INTEGRATOR
OUTPUT
INTERNAL
CLOCK
INTERNAL
LATCH
STATUS
OUTPUT
MODE
INPUT
INTERNAL
MODE
SEN INPUT
(UART TBRE)
CE/LOAD
(UART TBRL)
HBEN
HIGH BYTE
DATA
UART
NORM
MBEN
MIDDLE
BYTE DATA
LBEN
LOW BYTE
DATA
ZERO-CROSSING OCCURS
ZERO-CROSSING DETECTED
DATA VALID
DATA VALID
DATA VALID
DON’T CARE
THREE-STATE HIGH IMPEDANCE
FIGURE 12. HANDSHAKE - TYPICAL UART INTERFACE TIMING
5-23