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X28C512_06 Datasheet, PDF (16/21 Pages) Intersil Corporation – 5V, Byte Alterable EEPROM
DATA Polling Timing Diagram (Note 7)
X28C512, X28C513
Address
An
An
An
CE
WE
tOEH
OE
I/O7
DIN = X
Toggle Bit Timing Diagram
CE
DOUT = X
tWC
tOES
tDW
DOUT = X
WE
tOEH
OE
HIGH Z
I/O6
*
*
tWC
*Starting and ending state will vary, depending upon actual tWC.
NOTE:
7. Polling operations are by definition read cycles and are therefore subject to read cycle timings.
tOES
tDW
16
FN8106.2
June 7, 2006