ISL78223 Datasheet, PDF (15/20 Pages) Intersil Corporation – ZVS Full-Bridge PWM Controller with Adjustable Synchronous Rectifier Control

ISL78223
Rearranging to solve for R9 yields:
R9 = ⁽---^D-----⁽--^V----^C-----^T---^B----^U----^F-----–-----⁰---^.--⁴---⁾----–----^V-----^e----+-----^Δ----^V----^C----^S-----+-----⁰----^.-⁴----⁾----^â‹---^R----⁶--
V_e – ΔV_CS
Ω
(EQ. 23)
The value of R_CS determined in Equation 18 or 21 must be
rescaled so that the current sense signal presented at the CS pin
is that predicted by Equation 16. The divider created by R6 and
R9 makes this necessary.
R′_CS
=
R_-----6_-----+-----R_-----9_--
R9
⋅
R_C
S
(EQ. 24)
Example:
V_IN = 280V
V_O = 12V
L_O = 2.0µH
Np/Ns = 20
Lm = 2mH
I_O = 55A
Oscillator Frequency, Fsw = 400kHz
Duty Cycle, D = 85.7%
N_CT = 50
R6 = 499Ω
Solve for the current sense resistor, R_CS, using Equation 18.
R_CS = 15.1Ω.
Determine the amount of voltage, V_e, that must be added to the
current feedback signal using Equation 15.
Ve = 153mV
Next, determine the effect of the magnetizing current from
Equation 20.
ΔV_CS = 91mV
Using Equation 23, solve for the summing resistor, R9, from
CTBUF to CS.
R9 = 30.1kΩ
Determine the new value of R_CS, R’_CS, using Equation 24.
R’_CS = 15.4Ω
The above discussion determines the minimum external ramp
that is required. Additional slope compensation may be
considered for design margin.
If the application requires deadtime less than about 500ns, the
CTBUF signal may not perform adequately for slope
compensation. CTBUF lags the CT sawtooth waveform by 300ns
to 400ns. This behavior results in a non-zero value of CTBUF
when the next half-cycle begins when the deadtime is short.
Under these situations, slope compensation may be added by
externally buffering the CT signal as shown in Figure 13.
R9
R6
RCS
C4
1 VREF
20
2
19
ISL78223
3
18
4
17
5 CT
16
6
15
7
14
8 RAMP
13
9 CS
12
10
GND 11
CT
FIGURE 13. ADDING SLOPE COMPENSATION USING CT
Using CT to provide slope compensation instead of CTBUF
requires the same calculations, except that Equations 22 and 23
require modification. Equation 22 becomes:
V_e – ΔV_CS
=
-²----^D------^â‹---^R-----⁶---
R6 + R9
V
(EQ. 25)
and Equation 23 becomes:
R9 = -⁽--²----^D------–----_VV----_ee----–-+----_Δ-^Δ---_V-^V---_C-^C---_S-^S----⁾----^â‹---^R----⁶--
Ω
(EQ. 26)
The buffer transistor used to create the external ramp from CT
should have a sufficiently high gain (>200) so as to minimize the
required base current. Whatever base current is required reduces
the charging current into CT and will reduce the oscillator
frequency.
ZVS Full-Bridge Operation
The ISL78223 is a full-bridge zero-voltage switching (ZVS) PWM
controller that behaves much like a traditional hard-switched
topology controller. Rather than drive the diagonal bridge
switches simultaneously, the upper switches (OUTUL, OUTUR) are
driven at a fixed 50% duty cycle and the lower switches (OUTLL,
OUTLR) are pulse width modulated on the trailing edge.
15
FN7936.1
January 2, 2013