ISL6567 Datasheet, PDF (15/26 Pages) Intersil Corporation – Multipurpose Two-Phase Buck PWM Controller with Integrated MOSFET Drivers

ISL6567
MON pin’s functionality can be used to indicate when a
desired threshold has been reached (either by monitoring
the reference itself, or the output voltage controlled by the
ISL6567). By default, when operating in external-reference
mode and desiring PGOOD monitoring as shown in this
datasheet, it is recommended the MON is set to trip its
threshold when the output voltage (or reference) reaches
92% of the final set value, choosing the resistor divider as to
achieve a 2% hysteresis.
When operating in internal-reference mode, the value of the
reference is known to the ISL6567, so the MON pin function
can be bypassed by tying it to V_CC potential.
VOLTAGE TRACKING AND SEQUENCING
By making creative use of the reference clamps at the SS
and REFTRK pins, and/or the available external reference
input, as well as the functionality of the EN pin, the ISL6567
can accommodate the full spectrum of tracking and
sequencing options. The following figures offer some
implementation suggestions for a few typical situations.
clamp does not interfere with the desired ramp-up time or
slope of V_OUT.
Coincidental tracking using the internal reference results in a
behavior similar to that presented in Figure 13. The resistor
divider at the input of the differential amplifier sets the output
voltage, V_OUT, to the desired regulation level. The same
resistor divider used at the REFTRK pin divides down the
voltage to be tracked, effectively scaling it to the magnitude
of the internal reference. As a result, the output voltage
ramps up at the same rate as the target voltage, its ramp-up
leveling off at the programmed regulation level established
by the R_S/R_P resistor divider.
V_TARGET
V_OFS
V_OUT
V_TARGET
V_OUT
REFTRK
+
To V_{TARGET RS}
R_P
ISL6567
V_REF
EXT CIRCUIT
+
E/A
-
FB
R₁
VDIFF
-^V----^R----^E----^F--
V_OUT
=
--------^R----^P---------
R_P + R_S
+
X1
-
VSEN
RGND
R_P
R_S
-
+
To V_OUT
FIGURE 13. COINCIDENTAL VOLTAGE TRACKING
Simple ratiometric external voltage tracking, such as that
required by the termination voltage regulator for double data
rate (DDR) memory can be implemented by feeding a
reference voltage equal to 0.5 of the memory core voltage
(VDDQ) to the reference input of the ISL6567, as shown in
Figure 12. The resistor divider at the REFTRK pin sets the
V_OUT level. Select a suitable SS capacitor, such that the SS
V_{OFS REFTRK}
+
To V_TARGET
R_S
R_P
V_OFS
+-
+
-
+-
-^V----^R----^E----^F--
V_OUT
=
--------^R----^P---------
R_P + R_S
ISL6567
V_REF
EXT CIRCUIT
+
E/A
-
FB
R₁
VDIFF
+
X1
-
VSEN
RGND
R_P
R_S
-
+
To V_OUT
FIGURE 14. OFFSET VOLTAGE TRACKING
Offset tracking can be accomplished via a circuit similar to
that used for coincidental tracking (see Figure 14). The
desired offset can be implemented via a voltage source
inserted in line with the resistor divider present at the
REFTRK pin. Since most offset tracking requirements are
subject to fairly broad tolerances, simple voltage drop
sources can be used. Figure 14 exemplifies the use of
various counts of forward-biased diodes or that of a
Schottky, although other options are available.
Sequential start-up control is easily implemented via the EN
pin, using either a logic control signal or the ISL6567’s own
EN threshold as a power-good detector for the tracked, or
sequence-triggering, voltage. See Figure 15 for details of
control using the EN pin.
15
FN9243.3
May 28, 2009