ISL6567 Datasheet, PDF (12/26 Pages) Intersil Corporation – Multipurpose Two-Phase Buck PWM Controller with Integrated MOSFET Drivers

ISL6567
operation, the SS pin starts to output a small current which
charges the external capacitor, C_SS, connected to this pin.
An internal reference clamp controlled by the potential at the
SS pin releases the reference to the input of the error
amplifier with a 1:1 correspondence for SS potential
exceeding 0.7V (typically). Figure 5 details a normal
soft-start startup. Equation 6 helps determine the
approximate time period during which the controlled output
voltage is ramped from 0V to the desired DC-set level.
t_SS
=
C_{-----S----S-----}⋅_---V_{----R----E----F--}
I_SS
(EQ. 6)
V_OUT (0.5V/DIV)
V_intREF (0.5V/DIV)
GND>
GND>
V_SS (1V/DIV)
EN (5V/DIV)
FIGURE 5. NORMAL SOFT-START WAVEFORMS FOR
ISL6567-BASED MULTI-PHASE CONVERTER
Whenever the ISL6567’s power-on reset falling threshold is
tripped, or it is disabled via the EN pin, the SS capacitor is
quickly discharged via an internal pull-down device
(represented as the 1mA, typical, current source).
As the SS pin’s positive excursion is internally clamped to
about 3.5V, insure that any external pull-up device does not
force more than 3mA into this pin.
Should OC protection be tripped while the ISL6567 is
operating in internal-reference mode and the SS pin not be
allowed to fully discharge the SS capacitor, the ISL6567
cannot continue the normal SS cycling.
OVERCURRENT PROTECTION
The individual channel currents, as sensed via the PHASE
pins and scaled via the ISEN resistors, as well as their
combined average are continuously monitored and
compared with an internal overcurrent (OC) reference. If the
combined channel current average exceeds the reference
current, the overcurrent comparator triggers an overcurrent
event. Similarly, an OC event is also triggered if either
channel’s current exceeds the OC reference for 7
consecutive switching cycles.
OUTPUT CURRENT
EN
GND>
SS
GND>
OUTPUT VOLTAGE
FIGURE 6. OVERCURRENT BEHAVIOR WHILE IN INTERNAL
REFERENCE MODE
As a result of an OC event, output drives turn off both upper
and lower MOSFETs, and the SS capacitor is discharged via
a 20µA current source. The behavior following this standard
response varies depending whether the controller is
operating in internal (using internal reference; MON > 3.5V)
or external reference mode (using external reference; MON
< 3.5V). As shown in Figure 6, the soft-start capacitor
discharge prompted by the OC event is followed by two SS
cycles, during which the ISL6567 stays off. Following the
dormant SS cycles, the controller attempts to re-establish
the output. Should the OC condition been removed, the
output voltage is ramped up and operation resumes as
normal. Should the OC condition still be present and result in
another OC event, the entire behavior repeats until the OC
condition is removed or the IC is disabled. Figure 7 details
the OC behavior while in external reference mode. Following
the OC event, the output drives are turned off, the ISL6567
latches off, and the SS capacitor is discharged to ground.
Resetting the OC latch involves removal of bias power or
cycling of the EN pin (pictured in Figure 7). Should the OC
event been removed, the controller initiates a new SS cycle
and restores the output voltage.
OUTPUT CURRENT
EN
GGNNDD>>
SS
GND>
OUTPUT VOLTAGE
FIGURE 7. OVERCURRENT BEHAVIOR WHILE IN EXTERNAL
REFERENCE MODE
12
FN9243.3
May 28, 2009