ISL6567 Datasheet, PDF (10/26 Pages) Intersil Corporation – Multipurpose Two-Phase Buck PWM Controller with Integrated MOSFET Drivers

ISL6567
Operation
Figure 2 shows a simplified diagram of the voltage regulation
and current loops. The voltage loop is used to precisely
regulate the output voltage, while the current feedback is
used to balance the output currents, I_L1 and I_L2, of the two
power channels.
VOLTAGE LOOP
Feedback from the output voltage is fed via the on-board
differential amplifier and applied via resistor R₁ to the
inverting input of the Error Amplifier. The signal generated by
the error amplifier is summed up with the current correction
error signal and applied to the positive inputs of the PWM
circuit comparators. Out-of-phase sawtooth signals are
applied to the two PWM comparators inverting inputs.
Increasing error amplifier voltage results in increased duty
cycle. This increased duty cycle signal is passed to the
output drivers with no phase reversal to drive the external
MOSFETs. Increased duty cycle, translating to increased
ON-time for the upper MOSFET transistor, results in
increased output voltage, compensating for the low output
voltage which lead to the increase in the error signal in the
first place.
CURRENT LOOP
The current control loop is only used to finely adjust the
individual channel duty cycle, in order to balance the current
carried by each phase. The information used for this control
is the voltage that is developed across r_DS(ON) of each lower
MOSFET, while they are conducting. A resistor converts and
scales the voltage across each MOSFET to a current that is
applied to the current sensing circuits within the ISL6567.
Output from these sensing circuits is averaged and used to
compute a current error signal. Each PWM channel receives
a current signal proportional to the difference between the
average sensed current and the individual channel current.
When a PWM channel’s current is greater than the average
current, the signal applied via the summing correction circuit
to the PWM comparator reduces the output pulse width (duty
cycle) of the comparator to compensate for the detected
above average current in the respective channel.
MULTI-PHASE POWER CONVERSION
Multi-phase power conversion provides a cost-effective
power solution when load currents are no longer easily
supported by single-phase converters. Although its greater
complexity presents additional technical challenges, the
multi-phase approach offers advantages with improved
response time, superior ripple cancellation, and thermal
distribution.
INTERLEAVING
The switching of each channel in a ISL6567-based converter
is timed to be symmetrically out-of-phase with the other
channel. As a result, the two-phase converter has a
combined ripple frequency twice the frequency of one of its
phases. In addition, the peak-to-peak amplitude of the
combined inductor currents is proportionately reduced.
Increased ripple frequency and lower ripple amplitude
generally translate to lower per-channel inductance and/or
lower total output capacitance for any given set of
performance specification.
I_L2
PWM2
I_L1
PWM1
I_L1 + I_L2
FIGURE 3. PWM AND INDUCTOR-CURRENT WAVEFORMS
FOR 2-PHASE CONVERTER
Figure 3 illustrates the additive effect on output ripple
frequency. The two channel currents (I_L1 and I_L2), combine
to form the AC ripple current and the DC load current. The
ripple component has two times the ripple frequency of each
individual channel current.
To understand the reduction of ripple current amplitude in the
multi-phase circuit, examine the equation representing an
individual channel’s peak-to-peak inductor current.
I_{L, PP =}
(_---V_{----I--N-----–-----}V_{----O-----U----T---})_----⋅_----V_{----O----U-----T-}
L ⋅ f_S ⋅ V_IN
(EQ. 3)
V_IN and V_OUT are the input and output voltages,
respectively, L is the single-channel inductor value, and f_S is
the switching frequency.
The output capacitors conduct the ripple component of the
inductor current. In the case of multi-phase converters, the
capacitor current is the sum of the ripple currents from each
of the individual channels. Peak-to-peak ripple current
decreases by an amount proportional to the number of
channels. Output-voltage ripple is a function of capacitance,
capacitor equivalent series resistance (ESR), and inductor
ripple current. Reducing the inductor ripple current allows
the designer to use fewer or less costly output capacitors
(should output high-frequency ripple be an important design
parameter).
I_{PP =} ⁽_---^V_----^I_--^N_{-----–-----}^N_-L-----^•_-⋅--f-^V_-S---^O_--⋅---^U_-V---^T_-I--N⁾_----^â‹_----^V_----^O_----^U_-----^T_-
(EQ. 4)
10
FN9243.3
May 28, 2009