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ISL6540_06 Datasheet, PDF (15/20 Pages) Intersil Corporation – Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability
ISL6540
VOUT (LOCAL)
VSENSE- VSENSE+
(REMOTE) (REMOTE)
10Ω
GND (LOCAL) 10Ω
VCC
ROS
RFB
CSEN
VSEN-
VSEN+
ZIN
VMON
ZFB
FB
COMP
800mV
GAIN=1
VSS
OV/UV
COMP
ERROR AMP
FIGURE 6. SIMPLIFIED UNITY GAIN DIFFERENITAL SENSING IMPLEMENTATION
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
VIN
ISL6540
UGATE
Q1
PHASE
LO
VOUT
Q2
LGATE
PGND
CIN
CO
RETURN
part of ground or power plane in a printed circuit board. The
components shown in Figure 8 should be located as close
together as possible. Please note that the capacitors CIN
and CO each represent numerous physical capacitors.
Locate the ISL6540 within 3 inches of the MOSFETs, Q1
and Q2. The circuit traces for the MOSFETs’ gate and
source connections from the ISL6540 must be sized to
handle up to 4A peak current.
Proper grounding of the IC is important for correct operation
in noisy environments. The PGND pin should be connected
to board ground at the source of the low side MOSFET with
a wide short trace. The GND pin should be connected to a
large copper fill under the IC which is subsequently
connected to board ground at a quite location on the board,
typically found at an input or output bulk (electrolytic)
capacitor.
BOOT
D1
CBOOT
ISL6540 PHASE
SS
+5V
CSS
GND
PVCC
PGND
CPVCC
+VIN
Q1 LO
Q2 CO
VOUT
FIGURE 7. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
Figure 7 shows the critical power components of the
converter. To minimize the voltage overshoot/undershoot
the interconnecting wires indicated by heavy lines should be
FIGURE 8. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
15
FN9214.0
March 9, 2006