ISL26102 Datasheet, PDF (15/21 Pages) Intersil Corporation – Low-Noise 24-bit Delta Sigma ADC

ISL26102, ISL26104
Output Data Format
The converter outputs data in twos complement format in
accordance with coding shown in Table 5.
TABLE 5. OUTPUT CODES CORRESPONDING TO INPUT
INPUT SIGNAL
≥ + 0.5V_REF/GAIN
0.5V_REF/[GAIN*(2²³ - 1)]
0
-0.5V_REF/[GAIN*(2²³-1)]
≤ - 0.5V_REF/GAIN
DESCRIPTION
+ Over-range
+ 1 LSB
Zero Input
- 1 LSB
- Over-range
OUTPUT CODE (HEX)
7FFFFF
000001
000000
FFFFFF
800000
Operation of PDWN
When power is first applied to the converter, the PDWN pin must
transition from Low to High after both power supplies have
settled to specified levels in order to initiate a correct internal
power-on reset. A means of controlling the PDWN pin with a
simple RC delay circuit is illustrated in Figure 14. If AVDD and
DVDD are different supplies, be certain that AVDD is fully
established before PDWN goes high.
The PDWN pin can be taken low at any time to reduce power
consumption. When PDWN is taken low, all circuitry is shut
down, including the crystal oscillator. When coming out of
power-down, PDWN is brought high to resume operation. There
will be some delay before the chip begins operation. The delay
will depend upon the source of the clock being used. If the
XTALIN/CLOCK pin is driven by an external clock, the delay will be
minimal. If the crystal oscillator is the clock source, the oscillator
must start before the chip can function. Using the on chip crystal
oscillator amplifier with an attached 4.9152MHz clock will
typically require about 20ms to start-up.
DVDD
1kΩ
2.2nF
CONNECT TO
PDWN PIN
FIGURE 14. PDWN DELAY CIRCUIT
Standby Mode Operation
The A/D converter can be placed in the standby mode by writing
to the Standby register. Standby mode causes the converter to
enter a low power state except for the crystal oscillator amplifier.
If the converter is operated with a crystal connected to the
XTALIN/CLOCK and XTALOUT pins the crystal will continue to
oscillate. This reduces start-up time when the Standby register
bit is written back to logic 0 to exit standby mode.
Low Side Power Switch
The ADC includes a low side power switch. The LSPS pin is an
open drain connection to a transistor, which can be turned on or
off via bit control in the SDO/LSPS register. The LSPS switch can
be used to enable/disable excitation to external systems, such as
a load cell. Figure 15 illustrates the typical connection of the ADC
in a load cell measurement system. The LSPS pin is connected to
the low side of the load cell.
5V
3.3V
0.1µF
18
AVDD
16
DVDD
16 _VREF+
9 _CAP
0.1µF
SDO/RDY ^{24 GAIN = 128}
-
+
10 _CAP
SCLK ²³
ISL26102
SDI ²¹
20
11 _AIN1+
CS
22
MICRO
CONTROLLER
12
PDWN
AIN1-
13 AIN2+
XTALOUT ⁴
14 AIN2-
15
XTALIN/CLOCK
VREF-
3
19 _LSPS
AGND
17
DGND
2, 5, 7, 8
FIGURE 15. A LOAD CELL MEASUREMENT APPLICATION USING THE ISL26102
15
FN7608.0
October 12, 2012