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X80140 Datasheet, PDF (13/18 Pages) Intersil Corporation – Voltage Supervisor/Sequencer Quad Programmable Time Delay with Local/Remote Voltage Monitors
X80140, X80141, X80142, X80143, X80144
BYTE
ADDR. NAME
00H CR0
01H CR1
02H CR2
03H CR3
FF
FDR
CONTROL/STATUS
Write Enable
EEPROM Block
Control
POR Timing
ViGDO Time Delay
Fault Detection
Register
TABLE 4. REGISTER ADDRESS MAP
BIT
7
6
5
4
3
WEL
0
0
0
0
WPEN
0
0
BP1
BP0
0
T4D1
0
0
T4D0
0
0
T3D1
0
0
T3D0
0
TPOR1
T2D1
V40S
2
0
0
TPOR0
T2D0
V30S
1
0
0
0
T1D1
V20S
0
0
0
0
T1D0
V10S
MEMORY
TYPE
Volatile
EEPROM
EEPROM
EEPROM
Volatile
TABLE 5. HARDWARE/SOFTWARE CONTROL AND FAULT DETECTION BITS SUMMARY
OPERATION
CONTROL
LOCATION(S)
/STATUS REGISTER BITS
SOFTWARE CONTROL BITS
DESCRIPTION (SEE FUNCTIONAL FOR DETAILS)
EEPROM Write Enable
WEL
CR0
7
WEL = 1 enables write operations to the control registers and
EEPROM.
WEL = 0 prevents write operations.
EEPROM Write Protect
WPEN
CR1
7
WPEN = 1 (and WP pin HIGH) prevents writes to the control registers and
the EEPROM.
EEPROM Block Protect
BP1
BP0
CR1
4:3
BP1=0, BP0=0 : No EEPROM memory protected.
BP1=0, BP0=1 : Upper 1/4 of EEPROM memory protected
BP1=1, BP0=0 : Upper 1/2 of EEPROM memory protected.
BP1=1, BP0=1 : All of EEPROM memory protected.
RESET Time Delay
TPOR1
TPOR0
CR2
3:2
TPOR1=0, TPOR0=0 : RESET delay = 100ms
TPOR1=0, TPOR0=1 : RESET delay = 500ms
TPOR1=1, TPOR0=0 : RESET delay = 1s
TPOR1=1, TPOR0=1 : RESET delay = 5s
V1GDO Time Delay
V2GDO Time Delay
T1D1
T1D0
T2D1
T2D0
CR3
CR3
1:0
TiD1=0, TiD0=0 : ViGDO delay = 100ms
TiD1=0, TiD0=1 : ViGDO delay = 500ms
TiD1=1, TiD0=0 : ViGDO delay = 1s
3:2
TiD1=1, TiD0=1 : ViGDO delay = 5s
V3GDO Time Delay
T3D1
CR3
5:4
T3D0
V4GDO Time Delay
T4D1
CR3
7:6
T4D0
STATUS BITS
1st Voltage Monitor
V1OS
FDR
0
V1OS = 0 : V1GDO pin has been asserted (must be preset to 1).
2nd Voltage Monitor
V2OS
FDR
1
V2OS = 0 : V2GDO pin has been asserted (must be preset to 1).
3rd Voltage Monitor
V3OS
FDR
2
V3OS = 0 : V3GDO pin has been asserted (must be preset to 1).
4th Voltage Monitor
V4OS
FDR
3
V4OS = 0 : V4GDO pin has been asserted (must be preset to 1).
13
FN8153.0
January 20, 2005