ISL29501 Datasheet, PDF (12/23 Pages) Intersil Corporation – Auto gain control mechanism

ISL29501
The CEn (Chip Enable), in conjunction with shutdown, can be
used to keep the system passive based on power consumption
and speed of response.
Sampling Time
The sampling waveform in Figure 8 on page 13 dictates the
sensor operation. The key elements to understand are
integration time and sampling interval.
Integration time dictates the driver waveform active period and
sampling frequency provides the data output rate of the sensor.
Optimal values for integration time and sampling interval (duty
cycle) determine the power consumption and performance of the
system (precision). A typical emitter driver waveform is shown in
Figure 9 on page 13 to indicate the controls that are available to
the user.
Sampling interval determines the sensor response time or rate of
output from the sensor, this is user-defined with Equation 6:
Sampling frequency
450s  1 + sample_period[7:0]  2^{sample_skip[3:0]}
(EQ. 6)
The value for sampling frequency ranges from 1ms to 1843ms.
For a more detailed description of the register please refer to the
“Register Map” on page 17.
The ratio of integration time to sampling frequency is the sensor
duty cycle. Duty cycle determines the power consumption of the
sensor.
When building an optical system, a determination of an effective
duty cycle will help optimize power and performance trade-offs in
the system.
Integration Time
Integration time sets the emitter DAC active time. The value is
user controlled by the register interface.
If the sample integration time is set to be greater than the
sample period, then the integration time will default to
maximum allowable within the sample period.
Integration time impacts precision and power consumption of
the chip and can be used as a measure to optimize the system
performance.
Integration time = 71.1s  2^{sample_len[3:0]}
Maximum integration time = 71.1s  2¹¹ (145.6ms)
(EQ. 7)
For more detailed description of register please refer to the
“Register Map” on page 17.
Automatic Gain Control
The ISL29501 has an advanced automatic gain control loop,
which sets the analog signal levels at an optimum level by
controlling programmable gain amplifiers. The internal
algorithms determine the criteria for optimal gain.
The goal of the AGC controller is to achieve the best SNR
response for the given application.
Ambient ADC
The ambient ADC measures the level of ambient light present in
the environment. While this does not directly effect ISL29501
operation it can make changes in the photodiode that will effect
distance measurements. An accurate measurement scheme
makes real time correction in changing ambient light possible.
The ambient ADC operation does not interfere with sensor
operation. The ambient light magnitude can be read from
Register 0xE3[7:0]. This register tracks the ambient
photocurrent.
The ambient photocurrent values can be used to estimate the
best achievable SNR/Precision performance for a given
environment.
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FN8681.3
June 29, 2016