ISL6551 Datasheet, PDF (11/26 Pages) Intersil Corporation – ZVS Full Bridge PWM Controller

ISL6551
3,000
0°C
2,500
60°C
120°C
2,000
1,500
1,000
500
0
10
100 _{CT (pF)} 1,000
10,000
RECOMMENDED RANGE
FIGURE 2. CT vs FREQUENCY
- Note that the capacitance of a scope probe (~12pF for
single ended) would induce a smaller frequency at the
CT pin. It can be easily seen at a higher frequency. An
accurate operating frequency can be measured at the
outputs of the bridge/synchronous drivers.
- The dead time is the delay to turn on the upper FET
(UPPER1/UPPER2) after its corresponding lower FET
(LOWER1/LOWER2) is turned off when the bridge is
operating at maximum duty cycle in normal conditions,
or is responding to load transients or input line dipping
conditions. This helps to prevent shoot through between
the upper FET and the lower FET that are located at the
same side of the bridge. The dead time can be
estimated using Equation 2:
DT = ^M-------×-----R-----D-- (ns)
kΩ
(EQ. 2)
where M=11.4(VDD=12V), 11.1(VDD=14V), and
12(VDD=10V), and RD is in kΩ. This relationship is
shown in Figure 3.
2
1.6
1.2
0.8
0.4
0
0 ^{20 40 60 80 100 120 140 160}
RD (kΩ)
FIGURE 3. RD vs DEAD TIME (VDD = 12V)
• Error Amplifier (EAI, EANI, EAO)
- This amplifier compares the feedback signal received at
the EAI pin to a reference signal set at the EANI pin and
provides an error signal (EAO) to the PWM Logic. The
feedback loop compensation can be programmed via
these pins.
- Both EANI and EAO are clamped by the voltage
(Vclamp) set at the CSS pin, as shown in Figure 4. Note
that the diodes in the functional block diagram represent
the clamp function of the CSS in a simplified way.
• Soft-Start (CSS)
- The voltage on an external capacitor charged by an
internal current source I_SS is fed into a control pin on
the error amplifier. This causes the Error Amplifier to: 1)
limit the EAO to the soft-start voltage level; and 2) over-
ride the reference signal at the EANI with the soft-start
voltage, when the EANI voltage is higher than the soft-
start voltage. Thus, both the output voltage and current
of the power supply can be controlled by the soft-start.
- The clamping voltage determines the cycle-by-cycle
peak current limiting of the power supply. It should be
set above the EANI and EAO voltages and can be
programmed by an external resistor as shown in
Figure 4 using Equation 3.
Vclamp = Rcss • Iss (V)
(EQ. 3)
CSS
400mV
+
-
VDD
Iss
(See Fig. 9)
SSL
(TO
BLANKING
CIRCUIT)
R_CSS
SHUTDOWN
ERROR AMP
FIGURE 4. SIMPLIFIED CLAMP/SOFT-START
11
EAI
(–)
EANI
(+)
EAO
FN9066.4
July 8, 2005