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ISL5314 Datasheet, PDF (11/17 Pages) Intersil Corporation – Direct Digital Synthesizer
ISL5314
Electrical Specifications
AVDD = DVDD = +5V (unless otherwise noted), VREF = Internal 1.2V, IOUTFS = 20mA, TA = -40°C to +85°C for
all Min and Max Values. TA = +25°C for All Typical Values. Boldface limits apply over the operating
temperature range, -40°C to +85°C. (Continued)
PARAMETER
TEST CONDITIONS
MIN
MAX
(Note 4) TYP (Note 4) UNITS
Input Resistance
-
>1
-
MΩ
Input Current
-
1
-
μA
Maximum Input Voltage Allowed
(Excluding Comparator Sleep Mode)
-
4.0
3.75
V
Minimum Input Voltage, Peak-to-Peak (Dependent on Noise)
Propagation Delay, High to Low
(Note 11)
-
0.1
-
VP-P
-
6
-
ns
Propagation Delay, Low to High
(Note 11)
-
5
-
ns
Output Rise Time
(Note 11)
-
1.5
-
ns
Output Fall Time
(Note 11)
-
1.3
-
ns
Output High Voltage, VOH
Output Low Voltage, VOL
Output Jitter
IOH = -4mA
IOL = +4mA
2.6
-
-
V
-
-
0.4
V
-
0.5
-
ns
Maximum Output Toggle Rate
High Z Load (~1MΩ)
-
100
-
MHz
POWER SUPPLY CHARACTERISTICS
AVDD (Analog) Power Supply
DVDD (Digital) Power Supply
Analog Supply Current (IAVDD)
Digital Supply Current (IDVDD)
5V, IOUTFS = 20mA (Note 13)
5V, IOUTFS = 2mA
5V (Notes 8, 13)
3.3V (Notes 9, 12)
4.5
5.0
5.5
V
3.0
3.3
5.5
V
-
25
30
mA
-
7
-
mA
-
90
100
mA
-
50
55
mA
Power Dissipation
Power Supply Rejection
AVDD = 5V, DVDD = 3.3V, IOUTFS = 20mA (Notes 9, 12)
AVDD = 5V, DVDD = 5V, IOUTFS = 20mA (Notes 8, 13)
Single 5V Supply (Note 10)
-
290
363
mW
-
625
715
mW
-0.2
-
+0.2 % FSR/V
NOTES:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
5. Gain error for the DAC is measured as the error in the ratio between the full scale output current and the current through RSET (typically 625µA);
ideally the ratio should be 32.
6. Limits established by characterization and are not production tested.
7. Spectral measurements made with differential transformer coupled output and no external filtering.
8. Measured with the clock at 125MSPS and the output frequency at 10MHz.
9. Measured with the clock at 100MSPS and the output frequency at 10MHz.
10. See “Definition of Specifications” on page 12.
11. 50MHz, High Z Load (~1MΩ), 15pF capacitance, (IN- = 0.5VP-P), (IN+ = 0.25VDC).
12. For maximum value, 5.5V AVDD and 3.6V DVDD are used.
13. For maximum value, 5.5V AVDD and 5.5V DVDD are used.
11
FN4901.3
January 19, 2010