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82C59A_06 Datasheet, PDF (10/22 Pages) Intersil Corporation – CMOS Priority Interrupt Controller
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82C59A
ICW1
A0
0
D7
D6
D5
A7
A6
A5
D4
D3
D2
D1
D0
1
LTIM
ADI SNGL IC4
1 = ICW4 needed
0 = No ICW4 needed
1 = Single
0 = Cascade Mode
CALL address interval
1 = Interval of 4
0 = Interval of 8
ICW2
1 = Level triggered mode
0 = Edge triggered mode
A7 - A5 of Interrupt vector address
(MCS-80/85 mode only)
A0
D7
D6
D5
D4
D3
D2
1
A15
A14
A13
A12
A11
A10
T7
T6
T5
T4
T3
ICW3 (MASTER DEVICE)
D1
A9
D0
A8
A15 - A8 of interrupt vector address
(MCS80/85 mode)
T7 - T3 of interrupt vector address
(8086/8088 mode)
A0
D7
D6
D5
D4
D3
D2
D1
D0
1
S7
S6
S5
S4
S3
S2
S1
S0
ICW3 (SLAVE DEVICE)
1 = IR input has a slave
0 = IR input does not have a slave
A0
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
0
0
0
ID2
ID1
ID0
SLAVE ID (NOTE)
0 123 4 567
0 101 0 101
0 011 0 011
0 000 1 111
ICW4
A0
D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
0
SFNM BUF
M/S AEOI µPM
1 = 8086/8088 mode
0 = MCS-80/85 mode
1 = Auto EOI
0
X - Non buffered mode0 = Normal EOI
1
0 - Buffered mode slave
1
1 - Buffered mode master
NOTE: Slave ID is equal to the corresponding master IR input.
1 = Special fully nested moded
0 = Not special fully nested mode
FIGURE 7. 82C59A INITIALIZATION COMMAND WORD FORMAT
10
FN2784.5
March 17, 2006
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