ISL33001 Datasheet, PDF (1/19 Pages) Intersil Corporation – I2C Bus Buffer with Rise Time Accelerators and Hot Swap Capability

I²C Bus Buffer with Rise Time Accelerators and
Hot Swap Capability
ISL33001, ISL33002, ISL33003
The ISL33001, ISL33002, ISL33003 2-Channel Bus
Buffers provide the necessary buffering for extending the
bus capacitance beyond the 400pF maximum specified
by the I²C specification. In addition, the ISL33001,
ISL33002, ISL33003 feature rise time accelerator
circuitry to reduce power consumption from passive bus
pull-up resistors and improve data-rate performance. All
devices also include hot swap circuitry to prevent
corruption of the data and clock lines when I²C devices
are plugged into a live backplane and level translation for
mixed supply voltage applications.
The ISL33001, ISL33002, ISL33003 operates at supply
voltages from +2.3V to +5.5V at a temperature range of
-40°C to +85°C.
Summary of Features
PART
LEVEL
ENABLE READY ACCELERATOR
NUMBER TRANSLATION PIN
PIN
DISABLE
ISL33001
No
Yes
Yes
No
ISL33002
Yes
No
No
Yes
ISL33003
Yes
Yes
No
No
Related Literature* (see page 15)
• AN1543, “ISL33001EVAL1Z, ISL33002EVAL1Z,
ISL33003EVAL1Z Evaluation Board Manual”
Features
• 2 Channel I²C Compatible Bi-Directional Buffer
• +2.3VDC to +5.5VDC Supply Range
• >400kHz Operation
• Bus Capacitance Buffering
• Rise Time Accelerators
• Hot-Swapping Capability
• ±6kV Class 3 HBM ESD Protection On All Pins
• ±12kV HBM ESD Protection on SDA/SCL Pins
• Enable Pin (ISL33001 and ISL33003)
• Logic Level Translation (ISL33002 and ISL33003)
• READY Logic Pin (ISL33001)
• Accelerator Disable Pin (ISL33002)
• Pb-Free (RoHS Compliant) 8 Ld SOIC (ISL33001
only), 8 Ld TDFN (3mmx3mm) and 8 Ld MSOP
packages
• Low Quiescent Current . . . . . . . . . . . . . 2.2mA typ
• Low Shutdown Current . . . . . . . . . . . . . . 0.5µA typ
Applications*(see page 15)
• I²C Bus Extender and Capacitance Buffering
• Server Racks for Telecom, Datacom, and Computer
Servers
• Desktop Computers
• Hot-Swap Board Insertion and Bus Isolation
Typical Operating Circuit
V_CC1 +3.3V +5.0V
V_CC2
Bus Accelerator Performance
100kHz I²C BUS WITH 2.7kΩ PULL-UP RESISTOR
AND 400pF BUS CAPACITANCE
µC
SDA
SCL
EN
ISL33003
BACK
PLANE
SDA
SCL
GND
I²C
DEVICE
A
I²C
DEVICE
B
WITHOUT BUFFER
WITH BUFFER
September 30, 2010
FN7560.2
TIME (2µs/DIV)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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