82562EZ_08 Datasheet, PDF (9/66 Pages) Intel Corporation – Dual Footprint

82562EZ(EX)/82547GI(EI) Dual Footprint Design Guide
1.0
Introduction
Intel currently supports several footprint compatible Ethernet options depending upon the target
application. The term “footprint compatible” means that the silicon devices are all manufactured in
a 15 mm x 15 mm, 196-ball grid array package with the same ball pattern. Many of the critical
signal pin locations are identical, allowing designers to create a single LAN on Motherboard
(LOM) design that accommodates all devices. This is a flexible, cost-effective, multipurpose
design technique that allowing maximized value while matching performance needs.
Note: Since some of the signal pins have different usages, the term “pin-compatible” is not applicable.
Available LAN components with the same footprint include the 82547GI(EI) Gigabit Ethernet
Controller and the 82562EZ(EX) Platform LAN Connect components.
The LAN component used on a specific platform depends on the end user’s need for connection
speed and manageability. As the requirements change, footprint compatibility makes it possible to
re-focus the platform without the need to redesign a new a motherboard.
Table 1. LAN Component Connections/Features
LAN Component
Intel^® 82547GI(EI)
Intel^® 82562EX (196 BGA)
Intel^® 82562EZ (196 BGA)
Interface
CSA
LCI
LCI
Connection
Features
Gigabit Ethernet (1000BASE-T) Gigabit Ethernet, ASF 2.0
with Alert Standard Format
alerting
(ASF) alerting
10/100 Ethernet with ASF
alerting
Ethernet 10/100
connection, ASF 1.0
alerting
Basic 10/100 Ethernet
Ethernet 10/100
connection
1.1
Scope
This application note contains Ethernet design guidelines applicable to LOM designs based on the
Intel^® 865 Chipset and Intel^® 875 Chipset. The document identifies similarities and differences
between the 82562EZ(EX) Platform LAN Connect device and the 82547GI(EI) Gigabit Ethernet
Controller.
Section 2 describes the port interfaces specific to each device.
Section 3 explains what you need to know to hook up an Ethernet device to the system.
Section 4 describes board layout techniques applicable to these devices.
Section 5 provides a reference to the design and layout checklists.
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