82562EZ_08 Datasheet, PDF (22/66 Pages) Intel Corporation – Dual Footprint

82562EZ(EX)/82547GI(EI) Dual Footprint Design Guide
Table 8. 82562EZ(EX) Memory Layout (512 Byte EEPROM)
00h
HW/SW Reserved Area
3Fh
40h
ASF and Legacy
FFh
Manageability
NOTE: Legacy manageability only.
3.2.3
Magnetics Modules for 82562EZ(EX) PLC Device
A 5-core magnetics module should be carefully selected for your design. Table 9 lists suggested
integrated magnetics modules for use with the 82562EZ(EX) PLC device. These modules also
contain integrated USB jacks.
Note: These components are pin-compatible with the magnetics modules listed in Table 13 for the
82547GI(EI) controller.
Table 9. 82562EZ(EX) Recommended Magnetics Modules
Pulse
Stewart
Foxconn
Manufacturer
Manufacturer's Part Number
JW0A1P01R-E
SI-70027
UBC11123-J51
3.2.4
Power Supplies for 82562EZ(EX) PLC Implementations
The 82562EZ(EX) PLC device uses a single 3.3 V power supply. The 3.3 V supply must provide
approximately 90 mA current for full speed operation. Standby power must be furnished in order to
wake up from powerdown.
3.2.5
82562EZ(EX) Device Test Capability
The device contains an XOR test tree mechanism for simple board tests. Details of the XOR tree
operation are contained in the 82562ET LAN on Motherboard Design Guide.
3.3
3.3.1
Designing with the 82547GI(EI) Gigabit Ethernet Controller
This section provides design guidelines specific to the 82547GI(EI) controller.
82547GI(EI) Ethernet Controller LAN Disable Guidelines
The 82547GI(EI) Controller has a LAN_DISABLE# function that is present on FLSH_SO ball P9.
This pin can be connected to a GPIO pin on the ICH5 component to allow the BIOS to disable the
Ethernet port (see Figure 6). If the serial FLASH interface is populated, make sure the FLASH
serial output pin does not interfere with this function.
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