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83C196EA Datasheet, PDF (40/40 Pages) Intel Corporation – CHMOS 16-BIT MICROCONTROLLER
83C196EA CHMOS 16-BIT MICROCONTROLLER — AUTOMOTIVE
7.0 THERMAL CHARACTERISTICS
All thermal impedance data is approximate for static
air conditions at 1 watt of power dissipation. Values
will change depending on operating conditions and
the application. The Intel Packaging Handbook
(order number 240800) describes Intel’s thermal
impedance test methodology. The Components
Quality and Reliability Handbook (order number
210997) provides quality and reliability information.
Table 17. Thermal Characteristics
Package Type
160-pin QFP
θJA
34°C/W
θJC
5°C/W
8.0 83C196EA ERRATA
The 83C196EA may contain design defects or
errors known as errata. Characterized errata that
may cause the 83C196EA’s behavior to deviate
from published specifications are documented in a
specification update. Specification updates can be
obtained from your local Intel sales office or from
the World Wide Web (www.intel.com).
9.0 DATASHEET REVISION HISTORY
This datasheet is valid for devices with an “C” at the
end of the topside field process order (FPO)
number. Datasheets are changed as new device
information becomes available. Verify with your
local Intel sales office that you have the latest
version before finalizing a design or ordering
devices.
This is the -002 version of the datasheet. The
following changes were made in this version:
1. The status of the datasheet was revised from
“Product Preview” to “Advance Information”.
2. The frequency designation was changed from
32 MHz to 40 MHz.
3. The following DC characteristics specifications
were either changed or added:
• ICC (max)
• IIDLE (max)
• IOH2
• IOH3
4. The following AC characteristics multiplexed
bus mode specifications were changed:
• TCHCL (max)
• TLLCH (min/max)
36
• TRLCL (max)
• TCHWH (min)
• TWHLH (max)
• TAVYV (max)
• TCLYX (max)
• TWHQX (min)
• TLLAX (min)
• TRLDV (max)
5. The following AC characteristics demulti-
plexed bus mode specifications were
changed:
• TAVDV (max)
• TRLDV (max)
• TSLDV (max)
• TCHDV (max)
• TXHCH min/(max)
• TCHCL (min/max)
• TCLLH (min/max)
• TRLCL (min)
• TRLRH (min)
• TRHLH (max)
• TWLCL (min)
• TQVWH (min)
• TCHWH (min)
• TWLWH (min)
• TWHQX (max)
• TWHBX (min)
• TRHBX (min)
• TAVYV (max)
• TCLYX (max)
6. The following AC characteristics demulti-
plexed bus mode specifications were
removed:
• TLLCH
• TLHLH
• TLHLL
• TWHLH
7. Address out line in the System Bus Timing
Diagram (Demultiplexed Bus Mode) was cor-
rected from A20:16 to A20:0.
8. TCHYX (max) timing was corrected in the Ready
Timing Diagram to show the rising edge of
READY after the falling edge of CLKOUT.
9. HOLD#/HLDA# timings section was removed,
and all references to either HOLD# or HLDA#
were removed.
10. Synchronous Serial timing specifications
changed in table.
11. A/D sample and conversion times example
added.
12. Note 1 of the 8-bit mode A/D characteristics
table changed to state 20 mV, instead of 5 mV.
This is the -001 version of the datasheet. The
following changes were made in this version:
1. Package thermal characteristics changed.
ADVANCE INFORMATION