82562GT Datasheet, PDF (10/46 Pages) Intel Corporation – 10/100 Mbps Platform LAN Connect (PLC)

82562GT — Networking Silicon
2.1.3
2.2
LAN Connect Clock Operations
The 82562GT drives the Platform LAN Connect clock (JCLK) at one of two possible frequencies
depending upon its operation speed. When the 82562GT is in 100BASE-TX mode it drives JCLK
at 50 MHz. When the 82562GT is in 10BASE-T mode it drives JCLK at 5 MHz. The LAN Connect
clock does not stop during normal operation under any conditions. In reduced power mode, the
82562GT drives JCLK at 5 MHz, which is required for proper filtering of incoming packets for
applications such as Wake on LAN (WoL).
Hardware Configuration
Four pins, Test Enable (TESTEN), Test Clock (ISOL_TCK), Test Input (ISOL_TI), and Test
Execute (ISOL_EXEC), define the general operation of the 82562GT. Table 1 lists the pin settings
for the different modes of operation.
Table 1. 82562GT Hardware Configuration
TESTEN
ISOL
_TCK
ISOL
_TI
ISOL_
EXEC
Mode
Comments
82562G family Mode 0:
The ISOL_TCK, ISOL_TCI, and
• LEDs are 82562E-compatible
(“A” configuration)
ISOL_EXEC, and ADV10/
LAN_DISABLE# pins have internal
10 K Ω pull-down resistors and
• LAN_DISABLE# pin is used as _{should not be connected for Mode}
0
0
0
0
ADV10 (auto-negotiation
0 (refer to Table 2).
advertise 10M only)
For the alternative 82562E drop-in
Alternative Mode: drop-in
replacement mode, pins may
replacement for existing 82562E- _{optionally be used as a LAN}
based designs
disable.
82562G family Mode 1:
0
0
1
1
• LEDs are in configuration B
• LAN_DISABLE# pin is single
The ISOL_TCK pin has an internal
10 K Ω pull-down resistor and
should not be connected for Mode
pin LAN disable (tri-state and _{1 (refer to Table 2).}
full power down function)
0
1
1
1 Isolate
Tri-state and power down.
1
0
1
0 Testing Mode
1
0
0
0 XOR Tree
Board testing plus tri-state.
The ISOL_TCK and ISOL_TI pins
82562G family Mode 2:
have 10 K Ω internal pull-down
1
0
0
1 _{Same as 0011 except that LEDs} resistors and should not be
are in configuration C
connected for Mode 2 (refer to
Table 2).
82562G family Mode 3:
The ISOL_TCK pin has an internal
1
0
1
1
10 K Ω pull-down resistor and
Same as 0011 except enhance Tx _{should not be connected for Mode}
rise and fall times.
3.
82562G family Mode 4:
The ISOL_TI and ISOL_EXEC
1
1
0
0
pins have internal 10 K Ω pull-
Same as 1001 except Enhance Tx _{down resistors and should not be}
rise and fall times.
connected for Mode 4.
4
Datasheet