IA8044_01 Datasheet, PDF (5/32 Pages) InnovASIC, Inc – SDLC COMMUNICATIONS CONTROLLER

IA8044/IA8344
SDLC COMMUNICATIONS CONTROLLER
Memory Organization
Preliminary Data Sheet
As of Production Version 00
Program Memory
Program Memory includes interrupt and Reset vectors. The interrupt vectors are spaced at 8-
byte intervals, starting from 0003H for External Interrupt 0.
Reset Vectors
Location
0003H
000BH
0013H
001BH
0023H
Service
External Interrupt 0
Timer 0 overflow
External Interrupt 1
Timer 1 overflow
SIU Interrupt
These locations may be used for program code, if the corresponding interrupts are not
used (disabled). The Program Memory space is 64K, from 0000H to FFFFH. The lowest 4K of
program code (0000H to 0FFFH) can be fetched from external or internal Program Memory. This
selection is made by strapping pin ‘EA’ (External Address) to GND or VCC. If during reset, ‘EA’
is held low, all the program code is fetched from external memory. If, during reset, ‘EA’ is held
high, the lowest 4K of program code (0000H to 0FFFH) is fetched from internal memory (ROM).
Data Memory
External Data Memory
The IA8044/IA8344 Microcontroller core incorporates the Harvard architecture, with separate
code and data spaces. The code from external memory is fetched by ‘psen’ strobe, while data
is read from RAM by bit 7 of P3 (read strobe) and written to RAM by bit 6 of P3 (write strobe).
The External Data Memory space is active only by addressing through use of the 16 bit Data
Pointer Register (DPTR). A smaller subset of external data memory (8 bit addressing) may be
accessed by using the MOVX instruction with register indexed addressing.
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