IA8044_01 Datasheet, PDF (26/32 Pages) InnovASIC, Inc – SDLC COMMUNICATIONS CONTROLLER

IA8044/IA8344
SDLC COMMUNICATIONS CONTROLLER
A.C. Characteristics¹
External Program Memory Characteristics
Symbol
Parameter
TLHLL
TAVLL
TLLAX²
TLLIV
TLLPL
TPLPH
TPLIV
TPXIX
TPXIZ³
TPXAV³
TAVIV
TAZPL
ALE Pulse Width
Address Valid to ALE Low
Address Hold After ALE Low
ALE Low to Valid Instr. In.
ALE Low to PSENn Low
PSENn Pulse Width
PSENn Low to Valid Instr. In
Input Instr. Hold After PSENn
Input Instr. Float After PSENn
PSENn to Address Valid
Address to Valid Instr. In
Address Float to PSENn
12 MHz Osc
Min Max
Preliminary Data Sheet
As of Production Version 00
Variable Clock 1/TCLCL
= 3.5 MHz TO 12 MHz Unit
Min
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. Actual values will provided for the External Program Memory Characteristics, External Data
Memory Characteristics, and Serial Interface Characteristics tables (pp. 26 – 27) upon completion
of device testing. Values from the original device data sheet may be used to characterize
parameters in the interim.
2.TLLAX for access to program memory is different from TLLAX for data memory.
3. Interfacing RUPI-44 devices with float times up to 75ns is permissible. This limited bus
contention will not cause any damage to Port 0 drivers
Copyright © 2001
innovASIC
The End of Obsolescence™
ENG210010112-00
Page 26 of 32
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