IA8044_01 Datasheet, PDF (13/32 Pages) InnovASIC, Inc – SDLC COMMUNICATIONS CONTROLLER

IA8044/IA8344
SDLC COMMUNICATIONS CONTROLLER
of these ports if they are not used for alternate purposes.
Preliminary Data Sheet
As of Production Version 00
Ports P0, P1, P2 and P3 can perform some alternate functions. Ports P0 and P2 are
used to access external memory. In this case, port ‘p0’ outputs the multiplexed lower 8 bits of
address with ‘ale’ strobe high and then reads/writes 8 bits of data. Port P2 outputs the higher 8
bits of address. Keeping ‘ea’ pin low (tied to GND) activates this alternate function for ports
P0 and P2.
Port P3 and P1 can perform some alternate functions. The pins of Port P3 are multifunctional.
They can perform additional functions as shown below.
Pin Symbol
P3.0 RxD
P3.1 TxD
P3.2 INT0
P3.3 INT1
P3.4 T0
P3.5 T1
P3.6 WR
P3.7 RD
Function
Serial input pin. Setting the appropriate bits in the Special
Function Register SCON activates this function. Serial input data at pin
P3.0 is strobed to the serial input register and can then be read by the CPU
from the Special Function Register SBUF.
Serial output pin. Setting the appropriate bits in the Special
Function Register SCON and writing data to be transmitted to the
Special Function Register SBUF activates this function. Note
that SBUF is used to read and transmit data. The function it
performs is determined by the CPU operation (read or write).
External interrupt 0 is activated on the falling edge by setting the
appropriate bits in Special Function Register IE (Interrupt
Enable)
External interrupt 1 is activated on the falling edge by setting the
appropriate bits in the Special Function Register IE (Interrupt
Enable)
Timer/Counter 0 external input. Setting the appropriate bits in the
Special Function Registers TCON and TMOD activates this
function.
Timer/Counter 1 external input. Setting the appropriate bits in the
Special Function Registers TCON and TMOD activates this
function.
External Data Memory write strobe, active LOW. This function
is activated by a CPU write access to External Data Memory
(MOV @DPTR, A).
External Data Memory read strobe, active LOW. This function is
activated by a CPU read access to External Data Memory (MOV
A, @DPTR).
P1.6 RTS
P1.7 CTS
Request To Send output.
Clear To Send input.
Copyright © 2001
innovASIC
The End of Obsolescence™
ENG210010112-00
Page 13 of 32
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