C161U Datasheet, PDF (85/469 Pages) Infineon Technologies AG – Embedded C166 with USB, USART and SSC

C161U
Central Processor Unit
ZEROS (FF1C_H / 8E_H)
SFR
Reset Value: 0000_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
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Constant Ones Register ONES
All bits of this bit-addressable register are fixed to '1' by hardware. This register can be
read only. Register ONES can be used as a register-addressable constant of all ones,
ie. for bit manipulation or mask generation. It can be accessed via any instruction, which
is capable of addressing an SFR.
ONES (FF1E_H / 8F_H)
SFR
Reset Value: FFFF_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1111111111111111
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5.5
PEC - Extension of Functionality
Introduction
Compared to existing C16x architecture, the PEC transfer function is enhanced by
extended functionality. The extended PEC function is a further step into DMA control
functionality. It especially supports integrated system design with XBUS as system bus.
Note: The device address decoding structure is always based on 24-bit addresses. But
due to the limited number of port P4 pins, only the address bits A20:A16 can be
made visible on the external X-Bus interface.
The extended PEC functions are defined as follows:
– Source pointer and destination pointer are extended to 24-bit pointer, thus enabling
PEC controlled data transfer between any two locations within the total address
space. Both 8-bit segment numbers of every source/destination pointer pair are
defined in one 16-bit SFR register; thus, 8 PEC segment number registers are
available for the 8 PEC channels.
– Two of the PEC channels are expanded by additional 16-bit transfer count registers;
when enabled, the original 8-bit bytecount in the control register serves as package
length count, thus defining the amount of bytes or words to be transferred with one
request. In C161U the package size is always limited to one transfer.
– For always two channels a chaining feature is provided. When enabled in the PEC
control register, a termination interrupt of one channel will automatically switch
transfer control to the other channel of the channel pair.
Data Sheet
85
2001-04-19