TLE9869QXA20_15 Datasheet, PDF (71/122 Pages) Infineon Technologies AG – Microcontroller with LIN and H-Bridge MOSFET Driver for Automotive Applications

24.2.1 Block Diagram
TLE9869QXA20
10-Bit Analog Digital Converter (ADC1)
3
3
/
/
MUX_SEL <2:0>
Channel Controller
(Sequencer)
ADC1 - SFR
P2.0
CH0
CH1
P2.2
CH2
P2.3
CH3
P2.4
MUX
CH4
P2.5
CH5
VDH
CH6
rfu
CH7
ADC1
10
A
D
/
10
/
ADC1_OUT_CH0
10
/
ADC1_OUT_CH01
10
/
ADC1_OUT_CH12
10
/
ADC1_OUT_CH23
10
MUX
/
ADC1_OUT_CH34
10
/
ADC11_OUT__CCHH54
10
/
ADC11_OUT__CCHH65
10
/
ADC11_OUT__CCHH76
10
/
ADC1_ROEUST_OCHU7T_EIM
OP1
OPA
OP2
Figure 27 ADC1 Top Level Block Diagram
ADC10B_Signal_Conditioning_TLE9869_B15.vsd
As shown in the figure above, the ADC1 postprocessing consists of a channel controller (Sequencer) and an 8-
channel demultiplexer. The channel control block controls the multiplexer sequencing on the analog side before
the ADC1 and on the digital domain after the ADC1. As described in the following section, the channel sequence
can be controlled in a flexible way, which allows a certain degree of channel prioritization.
This capability can be used e.g. to give a higher priority to some channels compared to the other channel
measurements.
Data Sheet
71
Rev. 1.0, 2015-04-30