XC228X Datasheet, PDF (70/110 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2287 / XC2286 / XC2285
XC2000 Family Derivatives
Preliminary
Functional Description
3.16
Power Management
The XC228x provides several means to control the power it consumes either at a given
time or averaged over a certain timespan. Three mechanisms can be used (partly in
parallel):
• Supply Voltage Management allows the temporary reduction of the supply voltage
of major parts of the logic, or even the complete disconnection. This drastically
reduces the power consumed because of leakage current, in particular at high
temperature.
Several power reduction modes provide the optimal balance of power reduction and
wake-up time.
• Clock Generation Management controls the frequency of internal and external
clock signals. While the clock signals for currently inactive parts of logic are disabled
automatically, the user can reduce the XC228x’s system clock frequency which
drastically reduces the consumed power.
External circuitry can be controlled via the programmable frequency output EXTCLK.
• Peripheral Management permits temporary disabling of peripheral modules. Each
peripheral can separately be disabled/enabled. Also the CPU can be switched off
while the peripherals can continue to operate.
Wake-up from power reduction modes can be triggered either externally by signals
generated by the external system, or internally by the on-chip wake-up timer, which
supports intermittent operation of the XC228x by generating cyclic wake-up signals. This
offers full performance to quickly react on action requests while the intermittent sleep
phases greatly reduce the average power consumption of the system.
Note: When selecting the supply voltage and the clock source and generation method,
the required parameters must be carefully written to the respective bitfields, to
avoid unintended intermediate states. Recommended sequences are provided
which ensure the intended operation of power supply system and clock system.
Data Sheet
68
V0.91, 2007-02
Draft Version