XC228X Datasheet, PDF (62/110 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2287 / XC2286 / XC2285
XC2000 Family Derivatives
Preliminary
Functional Description
3.11
Universal Serial Interface Channel Modules (USIC)
The XC228x features three USIC modules (USIC0, USIC1, USIC2), each providing two
serial communication channels.
The Universal Serial Interface Channel (USIC) module is based on a generic data shift
and data storage structure which is identical for all supported serial communication
protocols. Each channel supports complete full-duplex operation with a basic data buffer
structure (one transmit buffer and two receive buffer stages). In addition, the data
handling software can use FIFOs.
The protocol part (generation of shift clock/data/control signals) is independent from the
general part and is handled by protocol-specific preprocessors (PPPs).
The USIC’s input/output lines are connected to pins by a pin routing unit, so the inputs
and outputs of each USIC channel can be assigned to different interface pins providing
great flexibility to the application software. All assignments can be done during runtime.
Bus
Buffer & Shift Structure Protocol Preprocessors
Pins
Control 0
DBU
0
DSU
0
PPP_A
PPP_B
PPP_C
PPP_D
Control 1
DBU
1
DSU
1
PPP_A
PPP_B
PPP_C
PPP_D
fsys
Fractional
Dividers
Baud rate
Generators
Figure 10 General Structure of a USIC Module
USIC_basic.vsd
The regular structure of the USIC module brings the following advantages:
• Higher flexibility through configuration with same look-and-feel for data management
• Reduced complexity for low-level drivers serving different protocols
• Wide range of protocols, but improved performances (baud rate, buffer handling)
Data Sheet
60
V0.91, 2007-02
Draft Version